75 	if (s != &s->pics_state->pics[0])  in pic_clear_isr()
106 			if ((s->last_irr & mask) == 0) {  in pic_set_irq1()
124 	if (mask == 0)  in get_priority()
126 	priority = 0;  in get_priority()
127 	while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)  in get_priority()
149 	if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])  in pic_get_irq()
170 	if (irq2 >= 0) {  in pic_update_irq()
174 		pic_set_irq1(&s->pics[0], 2, 1);  in pic_update_irq()
175 		pic_set_irq1(&s->pics[0], 2, 0);  in pic_update_irq()
177 	irq = pic_get_irq(&s->pics[0]);  in pic_update_irq()
178 	pic_irq_request(s->kvm, irq >= 0);  in pic_update_irq()
192 	BUG_ON(irq < 0 || irq >= PIC_NUM_PINS);  in kvm_pic_set_irq()
200 			      s->pics[irq >> 3].imr, ret == 0);  in kvm_pic_set_irq()
211 	for (i = 0; i < PIC_NUM_PINS; i++)  in kvm_pic_clear_all()
241 	s->output = 0;  in kvm_pic_read_irq()
244 	irq = pic_get_irq(&s->pics[0]);  in kvm_pic_read_irq()
245 	if (irq >= 0) {  in kvm_pic_read_irq()
246 		pic_intack(&s->pics[0], irq);  in kvm_pic_read_irq()
249 			if (irq2 >= 0)  in kvm_pic_read_irq()
258 			intno = s->pics[0].irq_base + irq;  in kvm_pic_read_irq()
264 		intno = s->pics[0].irq_base + irq;  in kvm_pic_read_irq()
280 	s->last_irr = 0;  in kvm_pic_reset()
282 	s->imr = 0;  in kvm_pic_reset()
283 	s->priority_add = 0;  in kvm_pic_reset()
284 	s->special_mask = 0;  in kvm_pic_reset()
285 	s->read_reg_select = 0;  in kvm_pic_reset()
287 		s->special_fully_nested_mode = 0;  in kvm_pic_reset()
288 		s->auto_eoi = 0;  in kvm_pic_reset()
302 	for (irq = 0; irq < PIC_NUM_PINS/2; irq++)  in kvm_pic_reset()
313 	if (addr == 0) {  in pic_ioport_write()
314 		if (val & 0x10) {  in pic_ioport_write()
316 			if (val & 0x02)  in pic_ioport_write()
318 			if (val & 0x08)  in pic_ioport_write()
322 		} else if (val & 0x08) {  in pic_ioport_write()
323 			if (val & 0x04)  in pic_ioport_write()
325 			if (val & 0x02)  in pic_ioport_write()
327 			if (val & 0x40)  in pic_ioport_write()
332 			case 0:  in pic_ioport_write()
368 		case 0: { /* normal mode */  in pic_ioport_write()
370 				off = (s == &s->pics_state->pics[0]) ? 0 : 8;  in pic_ioport_write()
372 			for (irq = 0; irq < PIC_NUM_PINS/2; irq++)  in pic_ioport_write()
383 			s->irq_base = val & 0xf8;  in pic_ioport_write()
390 				s->init_state = 0;  in pic_ioport_write()
395 			s->init_state = 0;  in pic_ioport_write()
405 	if (ret >= 0) {  in pic_poll_read()
407 			s->pics_state->pics[0].isr &= ~(1 << 2);  in pic_poll_read()
408 			s->pics_state->pics[0].irr &= ~(1 << 2);  in pic_poll_read()
415 		ret |= 0x80;  in pic_poll_read()
417 		/* Bit 7 is 0, means there's no interrupt */  in pic_poll_read()
418 		ret = 0x07;  in pic_poll_read()
432 		s->poll = 0;  in pic_ioport_read()
434 		if ((addr & 1) == 0)  in pic_ioport_read()
463 		return 0;  in picdev_write()
466 	case 0x20:  in picdev_write()
467 	case 0x21:  in picdev_write()
469 		pic_ioport_write(&s->pics[0], addr, data);  in picdev_write()
472 	case 0xa0:  in picdev_write()
473 	case 0xa1:  in picdev_write()
478 	case 0x4d0:  in picdev_write()
479 	case 0x4d1:  in picdev_write()
487 	return 0;  in picdev_write()
496 		memset(val, 0, len);  in picdev_read()
498 		return 0;  in picdev_read()
501 	case 0x20:  in picdev_read()
502 	case 0x21:  in picdev_read()
503 	case 0xa0:  in picdev_read()
504 	case 0xa1:  in picdev_read()
509 	case 0x4d0:  in picdev_read()
510 	case 0x4d1:  in picdev_read()
518 	return 0;  in picdev_read()
600 	s->pics[0].elcr_mask = 0xf8;  in kvm_pic_init()
601 	s->pics[1].elcr_mask = 0xde;  in kvm_pic_init()
602 	s->pics[0].pics_state = s;  in kvm_pic_init()
612 	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x20, 2,  in kvm_pic_init()
614 	if (ret < 0)  in kvm_pic_init()
617 	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0xa0, 2, &s->dev_slave);  in kvm_pic_init()
618 	if (ret < 0)  in kvm_pic_init()
621 	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x4d0, 2, &s->dev_elcr);  in kvm_pic_init()
622 	if (ret < 0)  in kvm_pic_init()
629 	return 0;  in kvm_pic_init()