Lines Matching +full:clock +full:- +full:accuracy

1 // SPDX-License-Identifier: GPL-2.0
14 #include <asm/intel-family.h>
23  * lot of accuracy which leads to clock drift. As far as we know Bay Trail SoCs
26  * unclear if the root PLL outputs are used directly by the CPU clock PLL or
30  * So we can create a simplified model of the CPU clock setup using a reference
31  * clock of 100 MHz plus a quotient which gets us as close to the frequency
62  * Penwell and Clovertrail use spread spectrum clock,
161  * MSR-based CPU/TSC frequency discovery for certain CPUs.
179 	freq_desc = (struct freq_desc *)id->driver_data;  in cpu_khz_from_msr()
180 	if (freq_desc->use_msr_plat) {  in cpu_khz_from_msr()
190 	index = lo & freq_desc->mask;  in cpu_khz_from_msr()
191 	md = &freq_desc->muldiv[index];  in cpu_khz_from_msr()
197 	if (md->divider) {  in cpu_khz_from_msr()
198 		tscref = TSC_REFERENCE_KHZ * md->multiplier;  in cpu_khz_from_msr()
199 		freq = DIV_ROUND_CLOSEST(tscref, md->divider);  in cpu_khz_from_msr()
202 		 * accuracy than just calculating freq * ratio.  in cpu_khz_from_msr()
204 		res = DIV_ROUND_CLOSEST(tscref * ratio, md->divider);  in cpu_khz_from_msr()
206 		freq = freq_desc->freqs[index];  in cpu_khz_from_msr()