Lines Matching +full:0 +full:x1200
32 { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 },
33 { 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 },
51 /* need to avoid (0xfd<<32), (0xfe<<32), and (0xff<<32), ht used space */
52 #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32)
53 #define BASE_VALID(b) ((b) + MMCONF_SIZE <= (0xfdULL<<32) || (b) >= (1ULL<<40))
76 found = 0; in get_fam10h_pci_mmconf_base()
77 for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { in get_fam10h_pci_mmconf_base()
84 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in get_fam10h_pci_mmconf_base()
86 vendor = id & 0xffff; in get_fam10h_pci_mmconf_base()
87 device = (id>>16) & 0xffff; in get_fam10h_pci_mmconf_base()
109 tom2 = max(val & 0xffffff800000ULL, 1ULL << 32); in get_fam10h_pci_mmconf_base()
119 hi_mmio_num = 0; in get_fam10h_pci_mmconf_base()
120 for (i = 0; i < 8; i++) { in get_fam10h_pci_mmconf_base()
124 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); in get_fam10h_pci_mmconf_base()
128 start = (u64)(reg & 0xffffff00) << 8; /* 39:16 on 31:8*/ in get_fam10h_pci_mmconf_base()
129 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); in get_fam10h_pci_mmconf_base()
130 end = ((u64)(reg & 0xffffff00) << 8) | 0xffff; /* 39:16 on 31:8*/ in get_fam10h_pci_mmconf_base()
148 if (range[0].start > base + MMCONF_SIZE) in get_fam10h_pci_mmconf_base()
152 base = (range[0].start & MMCONF_MASK) - MMCONF_UNIT; in get_fam10h_pci_mmconf_base()
221 return 0; in set_check_enable_amd_mmconf()