1 // SPDX-License-Identifier: GPL-2.0
44  * This contains the irq mask for both 8259A irq controllers,
49  * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
50  * boards the timer interrupt is not really connected to any IO-APIC pin,
53  * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
61 	unsigned int mask = 1 << irq;  in mask_8259A_irq()  local
62 	unsigned long flags;  in mask_8259A_irq()  local
64 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in mask_8259A_irq()
65 	cached_irq_mask |= mask;  in mask_8259A_irq()
70 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in mask_8259A_irq()
75 	mask_8259A_irq(data->irq);  in disable_8259A_irq()
80 	unsigned int mask = ~(1 << irq);  in unmask_8259A_irq()  local
81 	unsigned long flags;  in unmask_8259A_irq()  local
83 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in unmask_8259A_irq()
84 	cached_irq_mask &= mask;  in unmask_8259A_irq()
89 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in unmask_8259A_irq()
94 	unmask_8259A_irq(data->irq);  in enable_8259A_irq()
99 	unsigned int mask = 1<<irq;  in i8259A_irq_pending()  local
100 	unsigned long flags;  in i8259A_irq_pending()  local
103 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in i8259A_irq_pending()
105 		ret = inb(PIC_MASTER_CMD) & mask;  in i8259A_irq_pending()
107 		ret = inb(PIC_SLAVE_CMD) & (mask >> 8);  in i8259A_irq_pending()
108 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in i8259A_irq_pending()
148  * much _has_ to be done exactly like this (mask it
154 	unsigned int irq = data->irq;  in mask_and_ack_8259A()
156 	unsigned long flags;  in mask_and_ack_8259A()  local
158 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in mask_and_ack_8259A()
161 	 * to overdo spurious IRQ handling - it's usually a sign  in mask_and_ack_8259A()
166 	 * usually resulting from the 8259A-1|2 PICs) occur  in mask_and_ack_8259A()
180 		inb(PIC_SLAVE_IMR);	/* DUMMY - (do we need this?) */  in mask_and_ack_8259A()
184 		 /* 'Specific EOI' to master-IRQ2 */  in mask_and_ack_8259A()
187 		inb(PIC_MASTER_IMR);	/* DUMMY - (do we need this?) */  in mask_and_ack_8259A()
191 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in mask_and_ack_8259A()
196 	 * this is the slow path - should happen rarely.  in mask_and_ack_8259A()
201 		 * 8259A - not spurious, go handle it.  in mask_and_ack_8259A()
227 	.name		= "XT-PIC",
267 	outb(0xff, PIC_MASTER_IMR);	/* mask all of 8259A-1 */  in i8259A_shutdown()
268 	outb(0xff, PIC_SLAVE_IMR);	/* mask all of 8259A-2 */  in i8259A_shutdown()
279 	unsigned long flags;  in mask_8259A()  local
281 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in mask_8259A()
283 	outb(0xff, PIC_MASTER_IMR);	/* mask all of 8259A-1 */  in mask_8259A()
284 	outb(0xff, PIC_SLAVE_IMR);	/* mask all of 8259A-2 */  in mask_8259A()
286 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in mask_8259A()
291 	unsigned long flags;  in unmask_8259A()  local
293 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in unmask_8259A()
295 	outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */  in unmask_8259A()
296 	outb(cached_slave_mask, PIC_SLAVE_IMR);	  /* restore slave IRQ mask */  in unmask_8259A()
298 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in unmask_8259A()
304 	unsigned long flags;  in probe_8259A()  local
316 	 * there and let legacy_pic->init() initialize it for nothing.  in probe_8259A()
326 	 * Check to see if we have a PIC.  Mask all except the cascade and  in probe_8259A()
330 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in probe_8259A()
332 	outb(0xff, PIC_SLAVE_IMR);	/* mask all of 8259A-2 */  in probe_8259A()
340 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in probe_8259A()
346 	unsigned long flags;  in init_8259A()  local
350 	raw_spin_lock_irqsave(&i8259A_lock, flags);  in init_8259A()
352 	outb(0xff, PIC_MASTER_IMR);	/* mask all of 8259A-1 */  in init_8259A()
355 	 * outb_pic - this has to work on a wide range of PC hardware.  in init_8259A()
357 	outb_pic(0x11, PIC_MASTER_CMD);	/* ICW1: select 8259A-1 init */  in init_8259A()
359 	/* ICW2: 8259A-1 IR0-7 mapped to ISA_IRQ_VECTOR(0) */  in init_8259A()
362 	/* 8259A-1 (the master) has a slave on IR2 */  in init_8259A()
370 	outb_pic(0x11, PIC_SLAVE_CMD);	/* ICW1: select 8259A-2 init */  in init_8259A()
372 	/* ICW2: 8259A-2 IR0-7 mapped to ISA_IRQ_VECTOR(8) */  in init_8259A()
374 	/* 8259A-2 is a slave on master's IR2 */  in init_8259A()
381 		 * In AEOI mode we just have to mask the interrupt  in init_8259A()
390 	outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */  in init_8259A()
391 	outb(cached_slave_mask, PIC_SLAVE_IMR);	  /* restore slave IRQ mask */  in init_8259A()
393 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);  in init_8259A()
398  * is to make x86 binary compatible among pc compatible and non-pc compatible
417 	.mask = legacy_pic_uint_noop,
430 	.mask = mask_8259A_irq,