Lines Matching +full:num +full:- +full:channels
1 // SPDX-License-Identifier: GPL-2.0-only
27 unsigned int num; member
40 struct hpet_channel *channels; member
52 u8 hpet_blockid; /* OS timer block num */
133 * is_hpet_enabled - Check whether the legacy HPET timer interrupt is enabled
143 u32 i, id, period, cfg, status, channels, l, h; in _hpet_print_config() local
159 channels = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1; in _hpet_print_config()
161 for (i = 0; i < channels; i++) { in _hpet_print_config()
207 struct hpet_channel *hc = hpet_base.channels + i; in hpet_reserve_platform_timers()
210 hd.hd_irq[i] = hc->irq; in hpet_reserve_platform_timers()
212 switch (hc->mode) { in hpet_reserve_platform_timers()
215 hc->mode = HPET_MODE_DEVICE; in hpet_reserve_platform_timers()
219 hpet_reserve_timer(&hd, hc->num); in hpet_reserve_platform_timers()
232 struct hpet_channel *hc = hpet_base.channels + i; in hpet_select_device_channel()
235 if (hc->mode == HPET_MODE_UNUSED) { in hpet_select_device_channel()
236 hc->mode = HPET_MODE_DEVICE; in hpet_select_device_channel()
299 unsigned int channel = clockevent_to_channel(evt)->num; in hpet_clkevt_set_state_periodic()
304 delta = ((uint64_t)(NSEC_PER_SEC / HZ)) * evt->mult; in hpet_clkevt_set_state_periodic()
305 delta >>= evt->shift; in hpet_clkevt_set_state_periodic()
318 * (See AMD-8111 HyperTransport I/O Hub Data Sheet, in hpet_clkevt_set_state_periodic()
330 unsigned int channel = clockevent_to_channel(evt)->num; in hpet_clkevt_set_state_oneshot()
343 unsigned int channel = clockevent_to_channel(evt)->num; in hpet_clkevt_set_state_shutdown()
363 unsigned int channel = clockevent_to_channel(evt)->num; in hpet_clkevt_set_next_event()
393 res = (s32)(cnt - hpet_readl(HPET_COUNTER)); in hpet_clkevt_set_next_event()
395 return res < HPET_MIN_CYCLES ? -ETIME : 0; in hpet_clkevt_set_next_event()
400 struct clock_event_device *evt = &hc->evt; in hpet_init_clockevent()
402 evt->rating = rating; in hpet_init_clockevent()
403 evt->irq = hc->irq; in hpet_init_clockevent()
404 evt->name = hc->name; in hpet_init_clockevent()
405 evt->cpumask = cpumask_of(hc->cpu); in hpet_init_clockevent()
406 evt->set_state_oneshot = hpet_clkevt_set_state_oneshot; in hpet_init_clockevent()
407 evt->set_next_event = hpet_clkevt_set_next_event; in hpet_init_clockevent()
408 evt->set_state_shutdown = hpet_clkevt_set_state_shutdown; in hpet_init_clockevent()
410 evt->features = CLOCK_EVT_FEAT_ONESHOT; in hpet_init_clockevent()
411 if (hc->boot_cfg & HPET_TN_PERIODIC) { in hpet_init_clockevent()
412 evt->features |= CLOCK_EVT_FEAT_PERIODIC; in hpet_init_clockevent()
413 evt->set_state_periodic = hpet_clkevt_set_state_periodic; in hpet_init_clockevent()
423 hc->cpu = boot_cpu_data.cpu_index; in hpet_legacy_clockevent_register()
424 strscpy(hc->name, "hpet", sizeof(hc->name)); in hpet_legacy_clockevent_register()
427 hc->evt.tick_resume = hpet_clkevt_legacy_resume; in hpet_legacy_clockevent_register()
457 hc->evt.features |= CLOCK_EVT_FEAT_PERIODIC; in hpet_legacy_clockevent_register()
458 hc->evt.set_state_periodic = hpet_clkevt_set_state_periodic; in hpet_legacy_clockevent_register()
463 clockevents_config_and_register(&hc->evt, hpet_freq, in hpet_legacy_clockevent_register()
465 global_clock_event = &hc->evt; in hpet_legacy_clockevent_register()
478 cfg = hpet_readl(HPET_Tn_CFG(hc->num)); in hpet_msi_unmask()
480 hpet_writel(cfg, HPET_Tn_CFG(hc->num)); in hpet_msi_unmask()
488 cfg = hpet_readl(HPET_Tn_CFG(hc->num)); in hpet_msi_mask()
490 hpet_writel(cfg, HPET_Tn_CFG(hc->num)); in hpet_msi_mask()
495 hpet_writel(msg->data, HPET_Tn_ROUTE(hc->num)); in hpet_msi_write()
496 hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hc->num) + 4); in hpet_msi_write()
505 .name = "HPET-MSI",
520 irq_domain_set_info(domain, virq, arg->hwirq, info->chip, NULL, in hpet_msi_init()
521 handle_edge_irq, arg->data, "edge"); in hpet_msi_init()
558 domain_info->data = (void *)(long)hpet_id; in hpet_create_irq_domain()
578 hpet_msi_controller.name = "IR-HPET-MSI"; in hpet_create_irq_domain()
592 return (int)(long)info->data; in hpet_dev_id()
612 struct irq_data *data = irq_get_irq_data(hc->irq); in hpet_clkevt_msi_resume()
625 struct clock_event_device *evt = &hc->evt; in hpet_msi_interrupt_handler()
627 if (!evt->event_handler) { in hpet_msi_interrupt_handler()
628 pr_info("Spurious interrupt HPET channel %d\n", hc->num); in hpet_msi_interrupt_handler()
632 evt->event_handler(evt); in hpet_msi_interrupt_handler()
638 if (request_irq(hc->irq, hpet_msi_interrupt_handler, in hpet_setup_msi_irq()
640 hc->name, hc)) in hpet_setup_msi_irq()
641 return -1; in hpet_setup_msi_irq()
643 disable_irq(hc->irq); in hpet_setup_msi_irq()
644 irq_set_affinity(hc->irq, cpumask_of(hc->cpu)); in hpet_setup_msi_irq()
645 enable_irq(hc->irq); in hpet_setup_msi_irq()
647 pr_debug("%s irq %u for MSI\n", hc->name, hc->irq); in hpet_setup_msi_irq()
655 struct clock_event_device *evt = &hc->evt; in init_one_hpet_msi_clockevent()
657 hc->cpu = cpu; in init_one_hpet_msi_clockevent()
662 evt->tick_resume = hpet_clkevt_msi_resume; in init_one_hpet_msi_clockevent()
673 struct hpet_channel *hc = hpet_base.channels + i; in hpet_get_unused_clockevent()
675 if (hc->mode != HPET_MODE_CLOCKEVT || hc->in_use) in hpet_get_unused_clockevent()
677 hc->in_use = 1; in hpet_get_unused_clockevent()
698 free_irq(hc->irq, hc); in hpet_cpuhp_dead()
699 hc->in_use = 0; in hpet_cpuhp_dead()
721 struct hpet_channel *hc = hpet_base.channels + i; in hpet_select_clockevents()
724 if (hc->mode != HPET_MODE_UNUSED) in hpet_select_clockevents()
728 if (!(hc->boot_cfg & HPET_TN_FSB_CAP)) in hpet_select_clockevents()
731 sprintf(hc->name, "hpet%d", i); in hpet_select_clockevents()
733 irq = hpet_assign_irq(hpet_domain, hc, hc->num); in hpet_select_clockevents()
737 hc->irq = irq; in hpet_select_clockevents()
738 hc->mode = HPET_MODE_CLOCKEVT; in hpet_select_clockevents()
744 pr_info("%d channels of %d reserved for per-cpu timers\n", in hpet_select_clockevents()
774 * This special feature is only enabled on x86-64 systems. It is unlikely
775 * that 32-bit x86 systems will have enough CPUs to require this feature
776 * with its associated locking overhead. We also need 64-bit atomic read.
779 * single atomic 64-bit read. It is explicitly assumed that arch_spinlock_t
831 * -------------- in read_hpet()
833 * its value is up-to-date. in read_hpet()
850 * For UP or 32-bit.
874 * config register reads a non-0xffffffff value to make sure that the
879 * On non-SB700 based machines this check is only done once and has no
914 } while ((now - start) < 200000UL); in hpet_counting()
945 * - ACPI tables
946 * - Enablement of intel_idle
947 * - Command line arguments which limit intel_idle C-state support
961 * dysfunctional in deeper C-states.
982 /* Check whether PC10 is enabled in PKG C-state limit */ in hpet_is_pc10_damaged()
998 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
1003 unsigned int i, channels; in hpet_enable() local
1035 * information and the number of channels in hpet_enable()
1041 channels = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1; in hpet_enable()
1044 * The legacy routing mode needs at least two channels, tick timer in hpet_enable()
1047 if (IS_ENABLED(CONFIG_HPET_EMULATE_RTC) && channels < 2) in hpet_enable()
1050 hc = kcalloc(channels, sizeof(*hc), GFP_KERNEL); in hpet_enable()
1055 hpet_base.channels = hc; in hpet_enable()
1056 hpet_base.nr_channels = channels; in hpet_enable()
1067 for (i = 0; i < channels; i++, hc++) { in hpet_enable()
1068 hc->num = i; in hpet_enable()
1071 hc->boot_cfg = cfg; in hpet_enable()
1073 hc->irq = irq; in hpet_enable()
1099 hpet_legacy_clockevent_register(&hpet_base.channels[0]); in hpet_enable()
1100 hpet_base.channels[0].mode = HPET_MODE_LEGACY; in hpet_enable()
1102 hpet_base.channels[1].mode = HPET_MODE_LEGACY; in hpet_enable()
1108 kfree(hpet_base.channels); in hpet_enable()
1109 hpet_base.channels = NULL; in hpet_enable()
1126 * 2) Reserve up to num_possible_cpus() channels as per CPU clockevents
1136 return -ENODEV; in hpet_late_init()
1143 return -ENODEV; in hpet_late_init()
1184 hpet_writel(hpet_base.channels[i].boot_cfg, HPET_Tn_CFG(i)); in hpet_disable()
1199 * 1) Update Interrupt - generate an interrupt, every second, when the
1201 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1202 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1203 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all frequencies in powers of 2)
1236 return (s32)(c2 - c1) < 0; in hpet_cnt_ahead()
1245 return -ENODEV; in hpet_register_irq_handler()
1247 return -EBUSY; in hpet_register_irq_handler()
1284 struct clock_event_device *evt = &hpet_base.channels[0].evt; in hpet_rtc_timer_init()
1287 clc = (uint64_t) evt->mult * NSEC_PER_SEC; in hpet_rtc_timer_init()
1288 clc >>= evt->shift + DEFAULT_RTC_SHIFT; in hpet_rtc_timer_init()
1350 hpet_prev_update_sec = -1; in hpet_set_rtc_irq_bit()
1382 struct clock_event_device *evt = &hpet_base.channels[0].evt; in hpet_set_periodic_freq()
1384 clc = (uint64_t) evt->mult * NSEC_PER_SEC; in hpet_set_periodic_freq()
1386 clc >>= evt->shift; in hpet_set_periodic_freq()
1404 int lost_ints = -1; in hpet_rtc_timer_reinit()