Lines Matching full:uv
6 * SGI UV APIC functions (note: not an Intel compatible APIC)
22 #include <asm/uv/uv_mmrs.h>
23 #include <asm/uv/uv_hub.h>
24 #include <asm/uv/bios.h>
25 #include <asm/uv/uv.h>
42 /* Information derived from CPUID and some UV MMRs */
66 panic("UV: error: undefined MMR: %s\n", str); in uv_undefined()
68 pr_crit("UV: error: undefined MMR: %s\n", str); in uv_undefined()
124 "UV: WARN: GAM_ADDR_MAP_CONFIG is not available\n"); in early_get_pnodeid()
136 pr_info("UV: n_skt:%d pnmsk:%x pn:%x\n", in early_get_pnodeid()
140 /* Running on a UV Hubbed system, determine which UV Hub Type it is */
190 pr_info("UV: part#:%x rev:%d rev_id:%d UVtype:0x%x\n", in early_set_hub_type()
210 /* UV2,3,4, UV BIOS TSC sync state available */ in uv_tsc_check_sync()
220 mark_tsc_async_resets("UV BIOS"); in uv_tsc_check_sync()
231 mark_tsc_unstable("UV BIOS"); in uv_tsc_check_sync()
234 pr_info("UV: TSC sync state from BIOS:0%d(%s)\n", sync_state, state); in uv_tsc_check_sync()
256 pr_info("UV: CPU does not have valid CPUID.11\n"); in early_get_apic_socketid_shift()
259 pr_info("UV: apicid_shift:%d apicid_mask:0x%x\n", uv_cpuid.apicid_shift, uv_cpuid.apicid_mask); in early_get_apic_socketid_shift()
260 pr_info("UV: socketid_shift:%d pnode_mask:0x%x\n", uv_cpuid.socketid_shift, uv_cpuid.pnode_mask); in early_get_apic_socketid_shift()
271 /* Find UV arch type entry in UVsystab */
288 /* Validate UV arch type field in UVsystab */
295 pr_info("UV: UVarchtype received from BIOS\n"); in decode_arch_type()
302 /* Determine if UV arch type entry might exist in UVsystab */
316 pr_err("UV: Cannot access UVsystab, remap failed\n"); in early_get_arch_type()
330 pr_err("UV: Cannot access UVarchtype, remap failed\n"); in early_get_arch_type()
345 /* UV system found, check which APIC MODE BIOS already selected */
371 /* (Not hubless), not a UV */ in uv_set_system_type()
374 /* Is UV hubless system */ in uv_set_system_type()
392 pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n", in uv_set_system_type()
399 pr_err("UV: NUMA is off, disabling UV support\n"); in uv_set_system_type()
435 /* Get UV hub chip part number & revision */ in uv_set_system_type()
438 /* Other UV setup functions */ in uv_set_system_type()
455 /* If not UV, return. */ in uv_acpi_madt_oem_check()
462 pr_info("UV: OEM IDs %s/%s, System/UVType %d/0x%x, HUB RevID %d\n", in uv_acpi_madt_oem_check()
529 /* Default UV memory block size is 2GB */
532 /* Kernel parameter to specify UV mem block size */
566 pr_info("UV: mem_block_size set to 0x%lx\n", mem_block_size); in set_block_size()
569 pr_err("UV: mem_block_size error with 0x%lx\n", mem_block_size); in set_block_size()
601 pr_info("UV: extra hole in GAM RE table @%d\n", (int)(gre - uv_gre_table)); in build_uv_gr_table()
605 …pr_err("UV: GAM table sockid(%d) too large(>%d) @%d\n", gre->sockid, _max_socket, (int)(gre - uv_g… in build_uv_gr_table()
666 pr_info("UV: GAM Range %2d %04x 0x%013lx-0x%013lx (%d)\n", i, grt->nasid, start, end, gb); in build_uv_gr_table()
755 .name = "UV large system",
833 pr_info("UV: Map %s_HI base address NULL\n", id); in map_high()
841 pr_info("UV: Map %s_HI 0x%lx - 0x%lx %s (%d segments)\n", in map_high()
860 pr_err("UV: GRU unavailable (no MMR)\n"); in map_gru_high()
865 pr_info("UV: GRU disabled (by BIOS)\n"); in map_gru_high()
896 pr_err("UV:%s:RH_GAM_MMR_OVERLAY_CONFIG MMR undefined?\n", in map_mmr_high()
904 pr_info("UV: MMR disabled\n"); in map_mmr_high()
967 pr_err("UV:%s:Invalid mapping type:%d\n", __func__, index); in calc_mmioh_map()
981 pr_info("UV: %s redirect base 0x%lx(@0x%lx) 0x%04x\n", in calc_mmioh_map()
987 pr_debug("UV:%s:Invalid NASID(%x):%x (range:%x..%x)\n", in calc_mmioh_map()
1013 pr_info("UV: %s[%03d..%03d] NASID 0x%04x ADDR 0x%016lx - 0x%016lx\n", in calc_mmioh_map()
1023 pr_info("UV: %s base:0x%lx shift:%d m_io:%d max_io:%d max_pnode:0x%x\n", in calc_mmioh_map()
1039 pr_info("UV: MMIOH0 disabled\n"); in map_mmioh_high()
1047 pr_info("UV: MMIOH1 disabled\n"); in map_mmioh_high()
1061 pr_info("UV: MMIOH0 disabled\n"); in map_mmioh_high()
1074 pr_info("UV: MMIOH1 disabled\n"); in map_mmioh_high()
1093 pr_info("UV: MMIOH disabled\n"); in map_mmioh_high()
1119 pr_warn("UV: unable to determine platform RTC clock frequency, guessing.\n"); in uv_rtc_init()
1148 * Called on each CPU to initialize the per_cpu UV data area.
1238 pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, hi->m_shift, hi->n_lshift); in uv_init_hub_info()
1239 …pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", hi->gpa_mask, hi->gpa_shift, … in uv_init_hub_info()
1240 pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, hi->global_mmr_shift); in uv_init_hub_info()
1242 pr_info("UV: gru_base/shift:0x%lx/%ld\n", in uv_init_hub_info()
1245 pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, hi->gnode_extra); in uv_init_hub_info()
1252 pr_info("UV: GAM Params...\n"); in decode_gam_params()
1253 pr_info("UV: mmr_base/shift:0x%llx/%d gru_base/shift:0x%llx/%d gpa_shift:%d\n", in decode_gam_params()
1286 pr_info("UV: GAM Range Table...\n"); in decode_gam_rng_tbl()
1287 …pr_info("UV: # %20s %14s %6s %4s %5s %3s %2s\n", "Range", "", "Size", "Type", "NASID", "SID", "PN… in decode_gam_rng_tbl()
1289 pr_info("UV: %2d: 0x%014lx-0x%014lx%c %5lu%c %3d %04x %02x %02x\n", in decode_gam_rng_tbl()
1316 pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x), pnodes(min:%x,max:%x), gap_end(%d)\n", in decode_gam_rng_tbl()
1336 pr_err("UV: BIOS UVsystab mismatch, (%x < %x)\n", in decode_uv_systab()
1338 pr_err("UV: Does not support UV, switch to non-UV x86_64\n"); in decode_uv_systab()
1367 pr_err("UV:%s:Unrecognized UV_SYSTAB_TYPE:%d, skipped\n", in decode_uv_systab()
1408 pr_info("UV: NODE_PRESENT_DEPTH = %d\n", in boot_init_possible_blades()
1412 pr_info("UV: NODE_PRESENT(%d) = 0x%016lx\n", i, np); in boot_init_possible_blades()
1418 pr_info("UV: NODE_PRESENT_0 = 0x%016lx\n", np); in boot_init_possible_blades()
1423 pr_info("UV: NODE_PRESENT_1 = 0x%016lx\n", np); in boot_init_possible_blades()
1436 pr_info("UV: number nodes/possible blades %d (%d - %d)\n", in boot_init_possible_blades()
1472 pr_info("UV: %s is 1:1, conversion table removed\n", tname); in free_1_to_1_table()
1492 pr_info("UV: No UVsystab socket table, ignoring\n"); in build_socket_tables()
1495 pr_err("UV: Error: UVsystab address translations not available!\n"); in build_socket_tables()
1527 pr_info("UV: sid:%02x type:%d nasid:%04x pn:%02x pn2s:%2x\n", in build_socket_tables()
1551 pr_info("UV: sid:%02x: apicid:%04x socket:%02d node:%03x s2n:%03x\n", in build_socket_tables()
1617 /* Initialize UV hubless systems */
1659 pr_err("UV: Unknown/unsupported UV hub\n"); in uv_system_init_hub()
1662 pr_info("UV: Found %s hub\n", hub); in uv_system_init_hub()
1666 /* Get uv_systab for decoding, setup UV BIOS calls */ in uv_system_init_hub()
1669 /* If there's an UVsystab problem then abort UV init: */ in uv_system_init_hub()
1671 pr_err("UV: Mangled UVsystab format\n"); in uv_system_init_hub()
1687 …pr_info("UV: Found %d hubs, %d nodes, %d CPUs\n", uv_num_possible_blades(), num_possible_nodes(), … in uv_system_init_hub()
1781 pr_info("UV: HUB:%2d pn:%02x nrcpus:%d\n", in uv_system_init_hub()
1787 pr_info("UV: min_pnode:%02x max_pnode:%02x\n", min_pnode, max_pnode); in uv_system_init_hub()
1806 * There is a different code path needed to initialize a UV system that does
1807 * not have a "UV HUB" (referred to as "hubless").