Lines Matching +full:0 +full:x8000000a
16 INTERCEPT_CR = 0,
26 /* Byte offset 000h (word 0) */
27 INTERCEPT_CR0_READ = 0,
155 u64 avic_backing_page; /* Offset 0xe0 */
156 u8 reserved_6[8]; /* Offset 0xe8 */
157 u64 avic_logical_id; /* Offset 0xf0 */
158 u64 avic_physical_id; /* Offset 0xf8 */
163 * Offset 0x3e0, 32 bytes reserved
173 #define TLB_CONTROL_DO_NOTHING 0
178 #define V_TPR_MASK 0x0f
193 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
215 #define LBR_CTL_ENABLE_MASK BIT_ULL(0)
218 #define SVM_INTERRUPT_SHADOW_MASK BIT_ULL(0)
232 #define SVM_NESTED_CTL_NP_ENABLE BIT(0)
237 #define SVM_TSC_RATIO_RSVD 0xffffff0000000000ULL
238 #define SVM_TSC_RATIO_MIN 0x0000000000000001ULL
239 #define SVM_TSC_RATIO_MAX 0x000000ffffffffffULL
240 #define SVM_TSC_RATIO_DEFAULT 0x0100000000ULL
244 #define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK (0xFFULL)
248 #define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK GENMASK_ULL(11, 0)
249 #define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK (0xFFFFFFFFFFULL << 12)
252 #define AVIC_PHYSICAL_ID_TABLE_SIZE_MASK (0xFFULL)
254 #define AVIC_DOORBELL_PHYSICAL_ID_MASK GENMASK_ULL(11, 0)
256 #define VMCB_AVIC_APIC_BAR_MASK 0xFFFFFFFFFF000ULL
259 #define AVIC_UNACCEL_ACCESS_OFFSET_MASK 0xFF0
260 #define AVIC_UNACCEL_ACCESS_VECTOR_MASK 0xFFFFFFFF
270 #define AVIC_PHYSICAL_MAX_INDEX_MASK GENMASK_ULL(8, 0)
273 * For AVIC, the max index allowed for physical APIC ID table is 0xfe (254), as
274 * 0xff is a broadcast to all CPUs, i.e. can't be targeted individually.
276 #define AVIC_MAX_PHYSICAL_ID 0XFEULL
279 * For x2AVIC, the max index allowed for physical APIC ID table is 0x1ff (511).
281 #define X2AVIC_MAX_PHYSICAL_ID 0x1FFUL
286 #define AVIC_HPA_MASK ~((0xFFFULL << 52) | 0xFFF)
288 #define SVM_SEV_FEAT_SNP_ACTIVE BIT(0)
353 u64 spec_ctrl; /* Guest version of SPEC_CTRL at 0x2E0 */
424 u64 reserved_0x320; /* rsp already available at 0x01d8 */
554 BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0xa0); in __unused_size_checks()
555 BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0xcc); in __unused_size_checks()
556 BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0xd8); in __unused_size_checks()
557 BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0x180); in __unused_size_checks()
558 BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0x248); in __unused_size_checks()
559 BUILD_BUG_RESERVED_OFFSET(vmcb_save_area, 0x298); in __unused_size_checks()
561 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0xc8); in __unused_size_checks()
562 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0xcc); in __unused_size_checks()
563 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0xd8); in __unused_size_checks()
564 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x1c0); in __unused_size_checks()
565 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x248); in __unused_size_checks()
566 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x298); in __unused_size_checks()
567 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x2f0); in __unused_size_checks()
568 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x320); in __unused_size_checks()
569 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x380); in __unused_size_checks()
570 BUILD_BUG_RESERVED_OFFSET(sev_es_save_area, 0x3f0); in __unused_size_checks()
572 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x0); in __unused_size_checks()
573 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0xcc); in __unused_size_checks()
574 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x148); in __unused_size_checks()
575 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x168); in __unused_size_checks()
576 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x180); in __unused_size_checks()
577 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x1e0); in __unused_size_checks()
578 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x200); in __unused_size_checks()
579 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x320); in __unused_size_checks()
580 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x380); in __unused_size_checks()
581 BUILD_BUG_RESERVED_OFFSET(ghcb_save_area, 0x3b0); in __unused_size_checks()
583 BUILD_BUG_RESERVED_OFFSET(ghcb, 0xff0); in __unused_size_checks()
586 #define SVM_CPUID_FUNC 0x8000000a
596 #define SVM_SELECTOR_TYPE_MASK (0xf)
609 #define SVM_EVTINJ_VEC_MASK 0xff
614 #define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
637 #define SVM_EXITINFO_REG_MASK 0x0F
660 return ghcb_##field##_is_valid(ghcb) ? ghcb->save.field : 0; \