355 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_bbox_hw_config()  local
374 	reg2->config = event->attr.config2;  in nhmex_bbox_hw_config()
382 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_bbox_msr_enable_event()  local
386 		wrmsrl(reg1->reg + 1, reg2->config);  in nhmex_bbox_msr_enable_event()
446 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_sbox_hw_config()  local
459 	reg2->config = event->attr.config2;  in nhmex_sbox_hw_config()
467 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_sbox_msr_enable_event()  local
472 		wrmsrl(reg1->reg + 2, reg2->config);  in nhmex_sbox_msr_enable_event()
673 	struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;  in nhmex_mbox_get_constraint()  local
694 	if (reg2->idx != EXTRA_REG_NONE &&  in nhmex_mbox_get_constraint()
695 	    (uncore_box_is_fake(box) || !reg2->alloc) &&  in nhmex_mbox_get_constraint()
696 	    !nhmex_mbox_get_shared_reg(box, reg2->idx, reg2->config))  in nhmex_mbox_get_constraint()
709 		if (reg2->idx != EXTRA_REG_NONE)  in nhmex_mbox_get_constraint()
710 			reg2->alloc = 1;  in nhmex_mbox_get_constraint()
742 	struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;  in nhmex_mbox_put_constraint()  local
753 	if (reg2->alloc) {  in nhmex_mbox_put_constraint()
754 		nhmex_mbox_put_shared_reg(box, reg2->idx);  in nhmex_mbox_put_constraint()
755 		reg2->alloc = 0;  in nhmex_mbox_put_constraint()
770 	struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;  in nhmex_mbox_hw_config()  local
807 		reg2->idx = EXTRA_REG_NHMEX_M_FILTER;  in nhmex_mbox_hw_config()
809 			reg2->config = event->attr.config2;  in nhmex_mbox_hw_config()
811 			reg2->config = ~0ULL;  in nhmex_mbox_hw_config()
813 			reg2->reg = NHMEX_M0_MSR_PMU_MM_CFG;  in nhmex_mbox_hw_config()
815 			reg2->reg = NHMEX_M1_MSR_PMU_MM_CFG;  in nhmex_mbox_hw_config()
840 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_mbox_msr_enable_event()  local
852 	if (reg2->idx != EXTRA_REG_NONE) {  in nhmex_mbox_msr_enable_event()
853 		wrmsrl(reg2->reg, 0);  in nhmex_mbox_msr_enable_event()
854 		if (reg2->config != ~0ULL) {  in nhmex_mbox_msr_enable_event()
855 			wrmsrl(reg2->reg + 1,  in nhmex_mbox_msr_enable_event()
856 				reg2->config & NHMEX_M_PMON_ADDR_MATCH_MASK);  in nhmex_mbox_msr_enable_event()
857 			wrmsrl(reg2->reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &  in nhmex_mbox_msr_enable_event()
858 				(reg2->config >> NHMEX_M_PMON_ADDR_MASK_SHIFT));  in nhmex_mbox_msr_enable_event()
859 			wrmsrl(reg2->reg, NHMEX_M_PMON_MM_CFG_EN);  in nhmex_mbox_msr_enable_event()
983 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_rbox_get_constraint()  local
1027 				 er->config2 == reg2->config)) {  in nhmex_rbox_get_constraint()
1031 			er->config2 = reg2->config;  in nhmex_rbox_get_constraint()
1091 	struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;  in nhmex_rbox_hw_config()  local
1106 		reg2->config = event->attr.config2;  in nhmex_rbox_hw_config()
1116 	struct hw_perf_event_extra *reg2 = &hwc->branch_reg;  in nhmex_rbox_msr_enable_event()  local
1138 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MASK(port), reg2->config);  in nhmex_rbox_msr_enable_event()
1144 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2->config);  in nhmex_rbox_msr_enable_event()