Lines Matching +full:0 +full:b00000000
20 #define state_h0 0
33 #define K0 2043430169 /* 0x79cc4519 */
34 #define K1 -208106958 /* 0xf3988a32 */
35 #define K2 -416213915 /* 0xe7311465 */
36 #define K3 -832427829 /* 0xce6228cb */
37 #define K4 -1664855657 /* 0x9cc45197 */
38 #define K5 965255983 /* 0x3988a32f */
39 #define K6 1930511966 /* 0x7311465e */
40 #define K7 -433943364 /* 0xe6228cbc */
41 #define K8 -867886727 /* 0xcc451979 */
42 #define K9 -1735773453 /* 0x988a32f3 */
43 #define K10 823420391 /* 0x311465e7 */
44 #define K11 1646840782 /* 0x6228cbce */
45 #define K12 -1001285732 /* 0xc451979c */
46 #define K13 -2002571463 /* 0x88a32f39 */
47 #define K14 289824371 /* 0x11465e73 */
48 #define K15 579648742 /* 0x228cbce6 */
49 #define K16 -1651869049 /* 0x9d8a7a87 */
50 #define K17 991229199 /* 0x3b14f50f */
51 #define K18 1982458398 /* 0x7629ea1e */
52 #define K19 -330050500 /* 0xec53d43c */
53 #define K20 -660100999 /* 0xd8a7a879 */
54 #define K21 -1320201997 /* 0xb14f50f3 */
55 #define K22 1654563303 /* 0x629ea1e7 */
56 #define K23 -985840690 /* 0xc53d43ce */
57 #define K24 -1971681379 /* 0x8a7a879d */
58 #define K25 351604539 /* 0x14f50f3b */
59 #define K26 703209078 /* 0x29ea1e76 */
60 #define K27 1406418156 /* 0x53d43cec */
61 #define K28 -1482130984 /* 0xa7a879d8 */
62 #define K29 1330705329 /* 0x4f50f3b1 */
63 #define K30 -1633556638 /* 0x9ea1e762 */
64 #define K31 1027854021 /* 0x3d43cec5 */
65 #define K32 2055708042 /* 0x7a879d8a */
66 #define K33 -183551212 /* 0xf50f3b14 */
67 #define K34 -367102423 /* 0xea1e7629 */
68 #define K35 -734204845 /* 0xd43cec53 */
69 #define K36 -1468409689 /* 0xa879d8a7 */
70 #define K37 1358147919 /* 0x50f3b14f */
71 #define K38 -1578671458 /* 0xa1e7629e */
72 #define K39 1137624381 /* 0x43cec53d */
73 #define K40 -2019718534 /* 0x879d8a7a */
74 #define K41 255530229 /* 0x0f3b14f5 */
75 #define K42 511060458 /* 0x1e7629ea */
76 #define K43 1022120916 /* 0x3cec53d4 */
77 #define K44 2044241832 /* 0x79d8a7a8 */
78 #define K45 -206483632 /* 0xf3b14f50 */
79 #define K46 -412967263 /* 0xe7629ea1 */
80 #define K47 -825934525 /* 0xcec53d43 */
81 #define K48 -1651869049 /* 0x9d8a7a87 */
82 #define K49 991229199 /* 0x3b14f50f */
83 #define K50 1982458398 /* 0x7629ea1e */
84 #define K51 -330050500 /* 0xec53d43c */
85 #define K52 -660100999 /* 0xd8a7a879 */
86 #define K53 -1320201997 /* 0xb14f50f3 */
87 #define K54 1654563303 /* 0x629ea1e7 */
88 #define K55 -985840690 /* 0xc53d43ce */
89 #define K56 -1971681379 /* 0x8a7a879d */
90 #define K57 351604539 /* 0x14f50f3b */
91 #define K58 703209078 /* 0x29ea1e76 */
92 #define K59 1406418156 /* 0x53d43cec */
93 #define K60 -1482130984 /* 0xa7a879d8 */
94 #define K61 1330705329 /* 0x4f50f3b1 */
95 #define K62 -1633556638 /* 0x9ea1e762 */
96 #define K63 1027854021 /* 0x3d43cec5 */
139 #define STACK_W (0)
232 #define IW_W1_ADDR(round, widx) IW_W_ADDR(round, widx, 0)
236 #define XW_W1_ADDR(round, widx) XW_W_ADDR(round, widx, 0)
241 vmovdqu 0*16(RDATA), XTMP0; /* XTMP0: w3, w2, w1, w0 */ \
253 vmovdqa XTMP0, IW_W1_ADDR(0, 0); \
254 vmovdqa XTMP4, IW_W1W2_ADDR(0, 0); \
255 vmovdqa XTMP1, IW_W1_ADDR(4, 0); \
256 vmovdqa XTMP5, IW_W1W2_ADDR(4, 0);
259 vmovdqa XTMP2, IW_W1_ADDR(8, 0); \
260 vmovdqa XTMP6, IW_W1W2_ADDR(8, 0);
263 vpshufd $0b00000000, XTMP0, W0; /* W0: xx, w0, xx, xx */ \
264 vpshufd $0b11111001, XTMP0, W1; /* W1: xx, w3, w2, w1 */ \
268 vpshufd $0b11111001, XTMP3, W5; /* W5: xx, w15, w14, w13 */
273 vpshufd $0b10111111, w0, XTMP0; \
276 vpshufd $0b10111111, w1, XTMP1; \
309 vpshufd $0b10111111, w4, XTMP4; \
311 vmovdqa XTMP4, XW_W1_ADDR((round), 0); \
314 vmovdqa XTMP1, XW_W1W2_ADDR((round), 0);
321 .long 0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f
347 movq %rbx, (STACK_REG_SAVE + 0 * 8)(%rsp);
372 /* Transform 0-3 + Load data part2. */
373 R1(a, b, c, d, e, f, g, h, 0, 0, IW); LOAD_W_XMM_2();
379 R1(a, b, c, d, e, f, g, h, 4, 0, IW);
385 R1(a, b, c, d, e, f, g, h, 8, 0, IW); SCHED_W_2(12, W0, W1, W2, W3, W4, W5);
391 R1(a, b, c, d, e, f, g, h, 12, 0, XW); SCHED_W_0(18, W2, W3, W4, W5, W0, W1);
396 R1(b, c, d, a, f, g, h, e, 15, 0, XW); SCHED_W_0(21, W3, W4, W5, W0, W1, W2);
401 R2(c, d, a, b, g, h, e, f, 18, 0, XW); SCHED_W_0(24, W4, W5, W0, W1, W2, W3);
406 R2(d, a, b, c, h, e, f, g, 21, 0, XW); SCHED_W_0(27, W5, W0, W1, W2, W3, W4);
411 R2(a, b, c, d, e, f, g, h, 24, 0, XW); SCHED_W_0(30, W0, W1, W2, W3, W4, W5);
416 R2(b, c, d, a, f, g, h, e, 27, 0, XW); SCHED_W_0(33, W1, W2, W3, W4, W5, W0);
421 R2(c, d, a, b, g, h, e, f, 30, 0, XW); SCHED_W_0(36, W2, W3, W4, W5, W0, W1);
426 R2(d, a, b, c, h, e, f, g, 33, 0, XW); SCHED_W_0(39, W3, W4, W5, W0, W1, W2);
431 R2(a, b, c, d, e, f, g, h, 36, 0, XW); SCHED_W_0(42, W4, W5, W0, W1, W2, W3);
436 R2(b, c, d, a, f, g, h, e, 39, 0, XW); SCHED_W_0(45, W5, W0, W1, W2, W3, W4);
441 R2(c, d, a, b, g, h, e, f, 42, 0, XW); SCHED_W_0(48, W0, W1, W2, W3, W4, W5);
446 R2(d, a, b, c, h, e, f, g, 45, 0, XW); SCHED_W_0(51, W1, W2, W3, W4, W5, W0);
451 R2(a, b, c, d, e, f, g, h, 48, 0, XW); SCHED_W_0(54, W2, W3, W4, W5, W0, W1);
456 R2(b, c, d, a, f, g, h, e, 51, 0, XW); SCHED_W_0(57, W3, W4, W5, W0, W1, W2);
461 R2(c, d, a, b, g, h, e, f, 54, 0, XW); SCHED_W_0(60, W4, W5, W0, W1, W2, W3);
466 R2(d, a, b, c, h, e, f, g, 57, 0, XW); SCHED_W_0(63, W5, W0, W1, W2, W3, W4);
471 R2(a, b, c, d, e, f, g, h, 60, 0, XW);
476 R2(b, c, d, a, f, g, h, e, 63, 0, XW);
496 cmpq $0, RNBLKS;
501 movq (STACK_REG_SAVE + 0 * 8)(%rsp), %rbx;
507 vmovdqa %xmm0, IW_W1_ADDR(0, 0);
508 vmovdqa %xmm0, IW_W1W2_ADDR(0, 0);
509 vmovdqa %xmm0, IW_W1_ADDR(4, 0);
510 vmovdqa %xmm0, IW_W1W2_ADDR(4, 0);
511 vmovdqa %xmm0, IW_W1_ADDR(8, 0);
512 vmovdqa %xmm0, IW_W1W2_ADDR(8, 0);