Lines Matching refs:g5
55 LOAD_ITLB_INFO(%g2, %g4, %g5)
56 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v)
78 mov %o2, %g5 ! save %o2
88 mov %g5, %o2 ! restore %o2
101 LOAD_DTLB_INFO(%g2, %g4, %g5)
102 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v)
121 mov %o2, %g5 ! save %o2
131 mov %g5, %o2 ! restore %o2
140 ldxa [%g0] ASI_SCRATCHPAD, %g5
142 ldx [%g5 + HV_FAULT_D_ADDR_OFFSET], %g5
158 brz,pn %g5, kvmap_itlb_4v
170 brz,pn %g5, kvmap_dtlb_4v
176 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g5, %g7)
181 mov SCRATCHPAD_UTSBREG2, %g5
182 ldxa [%g5] ASI_SCRATCHPAD, %g5
183 cmp %g5, -1
186 COMPUTE_TSB_PTR(%g5, %g4, REAL_HPAGE_SHIFT, %g2, %g7)
192 80: stx %g5, [%g2 + TRAP_PER_CPU_TSB_HUGE_TEMP]
253 or %g0, %g4, %g5
264 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5
266 or %g5, %g3, %g5
280 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5
282 or %g5, %g3, %g5
296 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
298 or %g5, %g3, %g5
312 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
314 or %g5, %g3, %g5
333 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g5
345 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
347 or %g5, %g3, %g5
371 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
373 or %g5, %g3, %g5
387 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
389 or %g5, %g3, %g5