include/asm/spitfire.h

1 /* SPDX-License-Identifier: GPL-2.0 */
18 #define TSB_TAG_TARGET		0x0000000000000000 /* All chips				*/
19 #define TLB_SFSR		0x0000000000000018 /* All chips				*/
20 #define TSB_REG			0x0000000000000028 /* All chips				*/
21 #define TLB_TAG_ACCESS		0x0000000000000030 /* All chips				*/
22 #define VIRT_WATCHPOINT		0x0000000000000038 /* All chips				*/
23 #define PHYS_WATCHPOINT		0x0000000000000040 /* All chips				*/
24 #define TSB_EXTENSION_P		0x0000000000000048 /* Ultra-III and later		*/
25 #define TSB_EXTENSION_S		0x0000000000000050 /* Ultra-III and later, D-TLB only	*/
26 #define TSB_EXTENSION_N		0x0000000000000058 /* Ultra-III and later		*/
27 #define TLB_TAG_ACCESS_EXT	0x0000000000000060 /* Ultra-III+ and later		*/
38 #define SPITFIRE_HIGHEST_LOCKED_TLBENT	(64 - 1)
39 #define CHEETAH_HIGHEST_LOCKED_TLBENT	(16 - 1)
101 			     : /* No outputs */  in spitfire_put_dcache_tag()
115 			     : /* No outputs */  in spitfire_put_icache_tag()
147 			     : /* No outputs */  in spitfire_put_dtlb_data()
180 			     : /* No outputs */  in spitfire_put_itlb_data()
189 			     : /* No outputs */  in spitfire_flush_dtlb_nucleus_page()
197 			     : /* No outputs */  in spitfire_flush_itlb_nucleus_page()
201 /* Cheetah has "all non-locked" tlb flushes. */
206 			     : /* No outputs */  in cheetah_flush_dtlb_all()
214 			     : /* No outputs */  in cheetah_flush_itlb_all()
218 /* Cheetah has a 4-tlb layout so direct access is a bit different.
223  * The third TLB is for data accesses to 8K non-locked translations, is
225  * instruction accesses to 8K non-locked translations, is 2 way
230  * the problem for me. -DaveM
286 			     : /* No outputs */  in cheetah_put_ldtlb_data()
296 			     : /* No outputs */  in cheetah_put_litlb_data()
328 			     : /* No outputs */  in cheetah_put_dtlb_data()
361 			     : /* No outputs */  in cheetah_put_itlb_data()