Lines Matching full:real
63 #define HV_ENORADDR 2 /* Invalid real address */
119 * HV_ENORADDR Buffer is to an illegal real address.
124 * by the real address in ARG0. The buffer provided must be 16 byte
148 * the SIR (trap type 0x04) real trap table (RTBA) entry point on one
228 * array in real memory, of which each 16-bit word is a CPU ID. CPU
231 * second is the (real address) pointer to the CPU ID list.
244 * ENORADDR Invalid PC or RTBA real address
248 * Start CPU with given CPU ID with PC in %pc and with a real trap
328 * ARG1: base real address
331 * ERRORS: ENORADDR Invalid base real address
334 * EBADALIGN Base real address is not correctly aligned
337 * Configure the given queue to be placed at the given base real
339 * must be a power of 2. The base real address must be aligned
342 * byte real address boundary.
377 * RET1: base real address
381 * Return the configuration info for the given queue. The base real
387 * base real address returned is undefined.
395 * ARG2: data real address
409 * 64-bytes at the given data real address. The data must be 64-byte
462 * ERRORS: ENORADDR Invalid RTBA real address
465 * Set the real trap base address of the local cpu to the given RTBA.
593 * ENORADDR Invalid real address in TTE
753 * ENORADDR Invalid real address in TTE
779 * ARG0: real address
781 * RET1: previous mmu fault area real address
782 * ERRORS: ENORADDR Invalid real address
786 * aligned real address specifies where MMU fault status information
788 * for the first invocation. Specifying a fault area at real address
799 * ERRORS: ENORADDR Invalid real address when disabling
814 * target address is a virtual address else it is a real address.
849 * ENORADDR Invalid real address for buffer pointer
870 * ENORADDR Invalid real address for buffer pointer
886 * RET1: fault area real address
890 * CPU. The real address of the fault status area is returned in
904 * ARG0: real address
908 * ERRORS: ENORADDR Invalid real address
913 * Zero the memory contents in the range real address to real address
915 * memory address range. Scrubbing is started at the given real
919 * The real address and length must be aligned on an 8K boundary, or
925 * use requires the arguments to be equal to the real address and length
933 * ARG0: real address
937 * ERRORS: ENORADDR Invalid real address
942 * Force the next access within the real address to real address plus
945 * returned in RET1. The real address and length must be aligned on
1020 * ARG0: real address of CCB completion area
1058 * ARG0: real address of CCB completion area
1166 * ARG0: buffer real address
1189 * ARG0: buffer real address
1220 * valid real address
1233 * The software state description argument is a real address of a data buffer
1254 * valid real address
1268 * ARG1: buffer real address
1283 * ARG1: buffer real address
1409 * ARG0: real address
1413 * ERRORS: ENORADDR Invalid real address
1415 * EBADALIGN Real address not aligned on 64-byte boundary
1418 * trace buffer to the hypervisor. The real address supplies the real
1428 * If the real address is illegal or badly aligned, then trap tracing
1441 * RET1: real address
1516 * ARG0: real address
1520 * ERRORS: ENORADDR Invalid real address
1521 * EBADALIGN Real address is not aligned on a 64-byte
1528 * Declare a domain dump buffer to the hypervisor. The real address
1541 * A specified size of 0 unconfigures the dump buffer. If the real
1554 * RET1: real address of current dump buffer
1861 * r_addr 64-bit real address
1890 * a real address.
1929 * EBADALIGN Improperly aligned real address
1930 * ENORADDR Invalid real address
1995 * RET2: real address
2012 * ARG1: real address
2017 * ENORADDR Invalid real address
2021 * for the given real address and attributes. Return the IO address in RET1
2088 * ARG1: real address
2094 * EBADALIGN Improperly aligned real address
2095 * ENORADDR Bad real address
2098 * Attempt to read the IO address given by the given devhandle, real address,
2110 * The caller must have permission to read from the given devhandle, real
2111 * address, which must be an IO address. The argument real address must be a
2123 * ARG1: real address
2130 * EBADALIGN Improperly aligned real address
2131 * ENORADDR Bad real address
2136 * real address, and size. Size must be 1, 2, 4, or 8. The write is
2153 * The caller must have permission to write to the given devhandle, real
2154 * address, which must be an IO address. The argument real address must be a
2167 * ARG1: real address
2173 * ENORADDR Bad real address
2175 * Synchronize a memory region described by the given real address and size,
2183 * function with updated real address and size arguments until the entire
2219 * ARG2: real address
2223 * EBADALIGN Improperly aligned real address
2224 * ENORADDR Bad real address
2227 * and to be placed at the given real address and be of the given
2228 * number of entries. The real address must be aligned exactly to match
2230 * queue must be aligned on a 2048 byte real address boundary. The MSI-EQ
2245 * RET1: real address
2252 * If the queue is unconfigured, the real address is undefined and the
2507 * real address of a pci_device_list. 32-bit aligned.
2515 * io_page_list A 64-bit aligned list of real addresses. Each real
2519 * io_page_list_p Real address of an io_page_list, 64-bit aligned.
2556 * ENORADDR r_addr is not a valid real address
2710 * The io_page_list_p specifies the real address of the 64-bit-aligned list of
2712 * real address of a page to be mapped in the IOTSB. The first entry in the I/O
2713 * page list contains the real address of the first page, the 2nd entry for the
2728 * It is implementation-defined whether I/O page real address validity checking
2758 * It is implementation-defined whether I/O page real address validity checking
2804 * Upon success, the real address of the mapping shall be returned in
2848 * ARG1: real address base of queue
2853 * given channel ID, to be placed at the given real address, and
2855 * The real address base of the queue must be aligned on the queue
2857 * queue must be aligned on a 2048 byte real address boundary.
2887 * RET1: real address base of queue
2891 * defined by the given channel ID. The real address is the currently
2892 * defined real address base of the defined queue, and num entries is the
2897 * entries set to zero and the real address will have an undefined value.
2942 * ARG1: real address base of queue
2947 * given channel ID, to be placed at the given real address, and
2949 * The real address base of the queue must be aligned on the queue
2951 * queue must be aligned on a 2048 byte real address boundary.
2979 * RET1: real address base of queue
2983 * defined by the given channel ID. The real address is the currently
2984 * defined real address base of the defined queue, and num entries is the
2989 * entries set to zero and the real address will have an undefined value.
3061 * ARG1: table real address
3065 * Register the MTE table at the given table real address, with the
3076 * RET1: table real address
3092 * ARG2: target real address
3093 * ARG3: local real address
3110 * RET1: real address
3118 * ARG0: real address
3302 * ARG0: real address
3304 * RET1: real address
3305 * ERRORS: ENORADDR Invalid real address
3306 * EBADALIGN Real address not aligned on 64-byte boundary
3309 * Enable MMU statistic gathering using the buffer at the given real
3310 * address on the current virtual CPU. The new buffer real address
3311 * is given in ARG1, and the previously specified buffer real address
3314 * If the passed in real address argument is zero, this will disable
3327 * RET1: real address
3330 * Return the current state and real address of the currently configured
3364 /* Real address of bytes to load or store bytes
3378 unsigned long base; /* Real address base of queue */
3379 unsigned long end; /* Real address end of queue */
3396 * ARG1: sub-function argument real address
3416 * The real address of the sub-function argument must be aligned on at