cpu/sh4a/clock-shx3.c

1 // SPDX-License-Identifier: GPL-2.0
3  * arch/sh/kernel/cpu/sh4/clock-shx3.c
5  * SH-X3 support for the clock framework
7  *  Copyright (C) 2006-2007  Renesas Technology Corp.
8  *  Copyright (C) 2006-2007  Renesas Solutions Corp.
9  *  Copyright (C) 2006-2010  Paul Mundt
19  * Default rate for the root input clock, reset this with clk_set_rate()
29 	return clk->parent->rate * 72;  in pll_recalc()
114 	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP027]),
115 	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP026]),
116 	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP025]),
117 	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP024]),
124 	CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
125 	CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),