cpu/sh4a/clock-sh7785.c

1 // SPDX-License-Identifier: GPL-2.0
3  * arch/sh/kernel/cpu/sh4a/clock-sh7785.c
7  *  Copyright (C) 2007 - 2010  Paul Mundt
20  * Default rate for the root input clock, reset this with clk_set_rate()
33 	return clk->parent->rate * multiplier;  in pll_recalc()
132 	CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP029]),
133 	CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP028]),
134 	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP027]),
135 	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP026]),
136 	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP025]),
137 	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP024]),
146 	CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
147 	CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),