Lines Matching +full:0 +full:xee0
26 [0] = {
27 .start = 0xa413fec0,
28 .end = 0xa413fec0 + 0x28 - 1,
33 .start = evt2irq(0x480),
59 DEFINE_RES_MEM(0xa4430000, 0x100),
60 DEFINE_RES_IRQ(evt2irq(0xc00)),
65 .id = 0,
80 DEFINE_RES_MEM(0xa4438000, 0x100),
81 DEFINE_RES_IRQ(evt2irq(0xc20)),
95 [0] = {
96 .start = 0xA4428000,
97 .end = 0xA44280FF,
101 .start = evt2irq(0xa60),
102 .end = evt2irq(0xa60),
107 static u64 usb_ohci_dma_mask = 0xffffffffUL;
116 .coherent_dma_mask = 0xffffffff,
124 [0] = {
126 .start = 0xA4420000,
127 .end = 0xA44200FF,
132 .start = evt2irq(0xa20),
133 .end = evt2irq(0xa20),
143 .coherent_dma_mask = 0xffffffff,
150 .channels_mask = 0x1f,
154 DEFINE_RES_MEM(0x044a0000, 0x60),
155 DEFINE_RES_IRQ(evt2irq(0xf00)),
160 .id = 0,
173 DEFINE_RES_MEM(0xa412fe90, 0x28),
174 DEFINE_RES_IRQ(evt2irq(0x400)),
175 DEFINE_RES_IRQ(evt2irq(0x420)),
176 DEFINE_RES_IRQ(evt2irq(0x440)),
181 .id = 0,
220 UNUSED = 0,
238 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
239 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480),
240 INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0),
241 INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500),
242 INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540),
243 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
244 /* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0),
245 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1, 0x800),
246 INTC_VECT(DMAC1, 0x820), INTC_VECT(DMAC1, 0x840),
247 INTC_VECT(DMAC1, 0x860), INTC_VECT(LCDC, 0x900),
249 INTC_VECT(SSL, 0x980),
251 INTC_VECT(USBFI, 0xa20), INTC_VECT(USBFI, 0xa40),
252 INTC_VECT(USBHI, 0xa60),
253 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
254 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00),
255 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80),
256 INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00),
257 INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU, 0xd80),
258 INTC_VECT(TPU, 0xda0), INTC_VECT(TPU, 0xdc0),
259 INTC_VECT(TPU, 0xde0), INTC_VECT(IIC, 0xe00),
260 INTC_VECT(MMC, 0xe80), INTC_VECT(MMC, 0xea0),
261 INTC_VECT(MMC, 0xec0), INTC_VECT(MMC, 0xee0),
262 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
263 INTC_VECT(AFEIF, 0xfe0),
267 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
268 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
269 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
270 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
271 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
272 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
273 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
274 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
275 { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
276 { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },