128 		waysize = current_cpu_data.dcache.sets;  in cache_init()
139 		waysize <<= current_cpu_data.dcache.entry_shift;  in cache_init()
147 			ways = current_cpu_data.dcache.ways;  in cache_init()
155 			     addr += current_cpu_data.dcache.linesz)  in cache_init()
158 			addrstart += current_cpu_data.dcache.way_incr;  in cache_init()
170 	if (current_cpu_data.dcache.ways > 1)  in cache_init()
204 	l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache);  in detect_cache_shape()
206 	if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED)  in detect_cache_shape()
209 		l1i_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.icache);  in detect_cache_shape()
211 	if (current_cpu_data.flags & CPU_HAS_L2_CACHE)  in detect_cache_shape()
212 		l2_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.scache);  in detect_cache_shape()
220 	if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {  in fpu_init()
222 		current_cpu_data.flags &= ~CPU_HAS_FPU;  in fpu_init()
264 		current_cpu_data.flags |= CPU_HAS_DSP;  in dsp_init()
267 	if (dsp_disabled && (current_cpu_data.flags & CPU_HAS_DSP)) {  in dsp_init()
269 		current_cpu_data.flags &= ~CPU_HAS_DSP;  in dsp_init()
302 	if (current_cpu_data.type == CPU_SH_NONE)  in cpu_init()
306 	current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -  in cpu_init()
307 				      current_cpu_data.icache.linesz;  in cpu_init()
309 	current_cpu_data.icache.way_size = current_cpu_data.icache.sets *  in cpu_init()
310 				    current_cpu_data.icache.linesz;  in cpu_init()
313 	current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -  in cpu_init()
314 				      current_cpu_data.dcache.linesz;  in cpu_init()
316 	current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *  in cpu_init()
317 				    current_cpu_data.dcache.linesz;  in cpu_init()
325 				       current_cpu_data.dcache.way_size - 1,  in cpu_init()
342 	current_cpu_data.asid_cache = NO_CONTEXT;  in cpu_init()
344 	current_cpu_data.phys_bits = __in_29bit_mode() ? 29 : 32;  in cpu_init()