include/asm/watchdog.h

1 /* SPDX-License-Identifier: GPL-2.0+
3  * include/asm-sh/watchdog.h
25  * See cpu-sh2/watchdog.h for explanation of this stupidity..
36  * CKS0-2 supports a number of clock division ratios. At the time the watchdog
39  * lower than WTCSR_CKS_1024, else we drop back into the usec range.
42  * --------------------------------------------
63  * 	sh_wdt_read_cnt - Read from Counter
64  * 	Reads back the WTCNT value.
72  *	sh_wdt_write_cnt - Write to Counter
73  *	@val: Value to write
76  *	The upper byte is set manually on each write.
84  *	sh_wdt_write_bst - Write to Counter
85  *	@val: Value to write
88  *	The upper byte is set manually on each write.
95  * 	sh_wdt_read_csr - Read from Control/Status Register
97  *	Reads back the WTCSR value.
105  * 	sh_wdt_write_csr - Write to Control/Status Register
106  * 	@val: Value to write
109  * 	register. The upper byte is set manually on each write.
117  * 	sh_wdt_read_cnt - Read from Counter
118  * 	Reads back the WTCNT value.
126  *	sh_wdt_write_cnt - Write to Counter
127  *	@val: Value to write
130  *	The upper byte is set manually on each write.
138  * 	sh_wdt_read_csr - Read from Control/Status Register
140  *	Reads back the WTCSR value.
148  * 	sh_wdt_write_csr - Write to Control/Status Register
149  * 	@val: Value to write
152  * 	register. The upper byte is set manually on each write.