Lines Matching +full:0 +full:xff000044
19 #define CCN_PVR 0xff000030
20 #define CCN_CVR 0xff000040
21 #define CCN_PRR 0xff000044
26 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
28 #define TASK_SIZE 0x7c000000UL
48 #define SR_DSP 0x00001000
49 #define SR_IMASK 0x000000f0
50 #define SR_FD 0x00008000
51 #define SR_MD 0x40000000
53 #define SR_USER_MASK 0x00000303 // M, Q, S, T bits
123 .flags = 0, \
140 __asm__ __volatile__("stc sr, %0\n\t" in disable_fpu()
141 "or %1, %0\n\t" in disable_fpu()
142 "ldc %0, sr" in disable_fpu()
152 __asm__ __volatile__("stc sr, %0\n\t" in enable_fpu()
153 "and %1, %0\n\t" in enable_fpu()
154 "ldc %0, sr" in enable_fpu()
160 #define FPSCR_INIT 0x00080000
162 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
163 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
194 __builtin_prefetch(x, 0, 3); in prefetch()