24 # define PCICR_ENDIANNESS 0
31 		.start	= 0x1000,
35 		.name	= "PCI MEM 0",
36 		.start	= 0xfd000000,
37 		.end	= 0xfd000000 + SZ_16M - 1,
41 		.start	= 0x10000000,
42 		.end	= 0x10000000 + SZ_64M - 1,
49 		.start	= 0xc0000000,
50 		.end	= 0xc0000000 + SZ_512M - 1,
59 	.io_offset	= 0,
60 	.mem_offset	= 0,
61 	.io_map_base	= 0xfe200000,
62 	.serr_irq	= evt2irq(0xa00),
63 	.err_irq	= evt2irq(0xaa0),
120 	for (i = cmd = 0; i < ARRAY_SIZE(pci_arbiter_errors); i++) {  in sh7780_pci_err_irq()
133 	for (i = cmd = 0; i < ARRAY_SIZE(pci_interrupt_errors); i++) {  in sh7780_pci_err_irq()
169 	__raw_writel(0, hose->reg_base + SH4_PCIAINT);  in sh7780_pci_setup_irqs()
179 	ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, 0,  in sh7780_pci_setup_irqs()
225 	if (!pci_is_66mhz_capable(hose, 0, 0))  in sh7780_pci66_init()
255 	chan->reg_base = 0xfe040000;  in sh7780_pci_init()
273 		pr_err("PCI: Unknown vendor ID 0x%04x.\n", id);  in sh7780_pci_init()
284 		pr_err("PCI: Found an unsupported Renesas host controller, device id 0x%04x.\n",  in sh7780_pci_init()
308 		__raw_writel((((memsize - SZ_512M) - SZ_1M) & 0x1ff00000) | 1,  in sh7780_pci_init()
315 		__raw_writel(0, chan->reg_base + SH4_PCILAR1);  in sh7780_pci_init()
316 		__raw_writel(0, chan->reg_base + SH4_PCILSR1);  in sh7780_pci_init()
324 	__raw_writel(((memsize - SZ_1M) & 0x1ff00000) | 1,  in sh7780_pci_init()
337 	__raw_writel(0, chan->reg_base + SH7780_PCICSCR0);  in sh7780_pci_init()
338 	__raw_writel(0, chan->reg_base + SH7780_PCICSAR0);  in sh7780_pci_init()
339 	__raw_writel(0, chan->reg_base + SH7780_PCICSCR1);  in sh7780_pci_init()
340 	__raw_writel(0, chan->reg_base + SH7780_PCICSAR1);  in sh7780_pci_init()
375 	__raw_writel(0, chan->reg_base + PCI_BASE_ADDRESS_0);  in sh7780_pci_init()
376 	__raw_writel(0, chan->reg_base + SH7780_PCIIOBR);  in sh7780_pci_init()
377 	__raw_writel(0, chan->reg_base + SH7780_PCIIOBMR);  in sh7780_pci_init()
401 	return 0;  in sh7780_pci_init()