Lines Matching full:transfer
59 #define SH4_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */
60 #define SH4_PCICLR_MDMA1 0x20000000 /* DMA1 Transfer Error */
61 #define SH4_PCICLR_MDMA2 0x10000000 /* DMA2 Transfer Error */
62 #define SH4_PCICLR_MDMA3 0x08000000 /* DMA3 Transfer Error */
63 #define SH4_PCICLR_TGT 0x04000000 /* Target Transfer Error */
80 #define SH4_PCIDMABT 0x140 /* DMA Transfer Arb. Register */
82 #define SH4_PCIDPA0 0x180 /* DMA0 Transfer Addr. */
84 #define SH4_PCIDTC0 0x188 /* DMA0 Transfer Cnt. */
93 #define SH4_PCIDCR_DIR 0x00000004 /* DMA Transfer Direction */
96 #define SH4_PCIDPA1 0x190 /* DMA1 Transfer Addr. */
98 #define SH4_PCIDTC1 0x198 /* DMA1 Transfer Cnt. */
100 #define SH4_PCIDPA2 0x1A0 /* DMA2 Transfer Addr. */
102 #define SH4_PCIDTC2 0x1A8 /* DMA2 Transfer Cnt. */
104 #define SH4_PCIDPA3 0x1B0 /* DMA3 Transfer Addr. */
106 #define SH4_PCIDTC3 0x1B8 /* DMA3 Transfer Cnt. */