Lines Matching +full:0 +full:x0c000000
17 #define PCIMCR_MRSET_OFF 0xBFFFFFFF
18 #define PCIMCR_RFSH_OFF 0xFFFFFFFB
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
48 pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM); in pci_fixup_pcic()
49 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); in pci_fixup_pcic()
51 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1); in pci_fixup_pcic()
52 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4); in pci_fixup_pcic()
58 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5); in pci_fixup_pcic()
59 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6); in pci_fixup_pcic()
60 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0); in pci_fixup_pcic()
61 pci_write_reg(chan, 0x00000000, SH4_PCILAR1); in pci_fixup_pcic()
63 return 0; in pci_fixup_pcic()