Lines Matching +full:0 +full:x300
32 [0] = {
34 .start = PA_LAN + 0x300,
35 .end = PA_LAN + 0x300 + 0x10 ,
47 .id = 0,
50 .coherent_dma_mask = 0xffffffff,
68 #define GPIO_PHCR 0xFFEA000E
69 #define GPIO_PMSELR 0xFFEA0080
70 #define GPIO_PECR 0xFFEA0008
93 __raw_writew(0x0213, FPGA_REQSEL); in se7780_setup()
96 __raw_writew(0x0000, GPIO_PECR); in se7780_setup()
97 __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR); in se7780_setup()
98 __raw_writew(0x0c00, GPIO_PMSELR); in se7780_setup()
101 __raw_writew(0x0001, FPGA_IVDRPW); in se7780_setup()