55  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
57  *                      b = 0 : VGA
96 	[0] = {
98 		.start  = 0x1a300300,
99 		.end    = 0x1a30030f,
121 		.offset = 0,
142 	[0] = {
144 		.start	= 0x00000000,
145 		.end	= 0x01ffffff,
163 		.sync		= 0, /* hsync and vsync are active low */
178 		.sync		= 0, /* hsync and vsync are active low */
192 	.ch[0] = {
204 	[0] = {
206 		.start	= 0xfe940000,
207 		.end	= 0xfe942fff,
211 		.start	= evt2irq(0xf40),
227 	.num_subdevs = 0,
231 	[0] = {
233 		.start	= 0xfe910000,
234 		.end	= 0xfe91009f,
238 		.start  = evt2irq(0x880),
245 	.id             = 0, /* "ceu.0" clock */
255 	.num_subdevs = 0,
259 	[0] = {
261 		.start	= 0xfe914000,
262 		.end	= 0xfe91409f,
266 		.start  = evt2irq(0x9e0),
284 	[0] = {
286 		.start	= 0xFE3C0000,
287 		.end	= 0xFE3C021d,
291 		.start  = evt2irq(0xf80),
298 	.id		= 0,
306 	.codec		= "ak4642-codec.0-0012",
307 	.platform	= "sh_fsi.0",
341 	[0] = {
343 		.start  = 0x044b0000,
344 		.end    = 0x044b000f,
348 		.start  = evt2irq(0xbe0),
355 	.id             = 0, /* "keysc0" clock */
365 	[0] = {
367 		.end   = SH_ETH_ADDR + 0x1FC - 1,
371 		.start = evt2irq(0xd60),
377 	.phy = 0x1f, /* SMSC LAN8187 */
383 	.id = 0,
396 	[0] = {
397 		.start	= 0xa4d80000,
398 		.end	= 0xa4d80124 - 1,
402 		.start	= evt2irq(0xa20),
403 		.end	= evt2irq(0xa20),
410 	.id		= 0,
413 		.coherent_dma_mask	= 0xffffffff,
425 	[0] = {
426 		.start	= 0xa4d90000,
427 		.end	= 0xa4d90123,
431 		.start	= evt2irq(0xa40),
432 		.end	= evt2irq(0xa40),
442 		.coherent_dma_mask	= 0xffffffff,
452 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
453 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
459 	[0] = {
461 		.start  = 0x04ce0000,
462 		.end    = 0x04ce00ff,
466 		.start  = evt2irq(0xe80),
479 	.id		= 0,
488 	[0] = {
490 		.start  = 0x04cf0000,
491 		.end    = 0x04cf00ff,
495 		.start  = evt2irq(0x4e0),
518 	[0] = {
520 		.start  = 0xA45D0000,
521 		.end    = 0xA45D0049,
525 		.start  = evt2irq(0x480),
544 	/* With open J18 jumper address is 0x21 */
545 	I2C_BOARD_INFO("ak8813", 0x20),
553 	.i2c_adap	= 0,
557 	[0] = {
558 		.start  = 0xfe960000,
559 		.end    = 0xfe962043,
563 		.start  = evt2irq(0x8e0),
603 		I2C_BOARD_INFO("ak4642", 0x12),
607 #define EEPROM_OP   0xBA206000
608 #define EEPROM_ADR  0xBA206004
609 #define EEPROM_DATA 0xBA20600C
610 #define EEPROM_STAT 0xBA206010
611 #define EEPROM_STRT 0xBA206014
624 	return 0;  in sh_eth_is_eeprom_ready()
637 	for (i = 0 ; i < 3 ; i++) {  in sh_eth_init()
638 		__raw_writew(0x0, EEPROM_OP); /* read */  in sh_eth_init()
640 		__raw_writew(0x1, EEPROM_STRT);  in sh_eth_init()
645 		sh_eth_plat.mac_addr[i << 1] = mac & 0xff;  in sh_eth_init()
650 #define SW4140    0xBA201000
651 #define FPGA_OUT  0xBA200400
652 #define PORT_HIZA 0xA4050158
653 #define PORT_MSELCRB 0xA4050182
655 #define SW41_A    0x0100
656 #define SW41_B    0x0200
657 #define SW41_C    0x0400
658 #define SW41_D    0x0800
659 #define SW41_E    0x1000
660 #define SW41_F    0x2000
661 #define SW41_G    0x4000
662 #define SW41_H    0x8000
672 	i2c_register_board_info(0, i2c0_devices,  in arch_setup()
674 	return 0;  in arch_setup()
692 	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,  in devices_setup()
718 	__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);  in devices_setup()
730 	__raw_writew(0x0600, 0xa40501d4);  in devices_setup()
733 	__raw_writew(0x0600, 0xa4050192);  in devices_setup()
735 	/* enable IRQ 0,1,2 */  in devices_setup()
781 	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);  in devices_setup()
907 		lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;  in devices_setup()
908 		lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);  in devices_setup()
911 		lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;  in devices_setup()
912 		lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);  in devices_setup()
917 		lcdc_info.ch[0].interface_type = RGB18;  in devices_setup()
918 		lcdc_info.ch[0].flags          = 0;  in devices_setup()
921 		lcdc_info.ch[0].interface_type = RGB24;  in devices_setup()
922 		lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;  in devices_setup()
940 	device_initialize(&ms7724se_ceu_devices[0]->dev);  in devices_setup()
941 	dma_declare_coherent_memory(&ms7724se_ceu_devices[0]->dev,  in devices_setup()
944 	platform_device_add(ms7724se_ceu_devices[0]);  in devices_setup()
957 /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */