53  *  0x0000_0000  uboot            16bit
54  *  0x0004_0000  Linux romImage   16bit
55  *  0x0014_0000  MTD for Linux    16bit
56  *  0x0400_0000  Internal I/O     16/32bit
57  *  0x0800_0000  DRAM             32bit
58  *  0x1800_0000  MFI              16bit
90 static unsigned char led_pos[] = { 0, 1, 2, 3 };
98 	.start  = 0xA405012C, /* PTG */
99 	.end    = 0xA405012E - 1,
117 		.offset = 0,
134 	[0] = {
136 		.start	= 0x00000000,
137 		.end	= 0x03ffffff,
152 #define SH_ETH_ADDR	(0xA4600000)
154 	[0] = {
156 		.end   = SH_ETH_ADDR + 0x1FC,
160 		.start = evt2irq(0xd60),
166 	.phy = 0x1f, /* SMSC LAN8700 */
173 	.id = 0,
193 	[0] = {
194 		.start	= 0xa4d80000,
195 		.end	= 0xa4d80124 - 1,
199 		.start	= evt2irq(0xa20),
200 		.end	= evt2irq(0xa20),
207 	.id		= 0,
210 		.coherent_dma_mask	= 0xffffffff,
229 	[0] = {
230 		.start	= 0xa4d90000,
231 		.end	= 0xa4d90124 - 1,
235 		.start	= evt2irq(0xa40),
236 		.end	= evt2irq(0xa40),
246 		.coherent_dma_mask	= 0xffffffff,
267 	return 0;  in usbhs_phy_reset()
286 	[0] = {
287 		.start	= 0xa4d90000,
288 		.end	= 0xa4d90124 - 1,
292 		.start	= evt2irq(0xa40),
293 		.end	= evt2irq(0xa40),
303 		.coherent_dma_mask	= 0xffffffff,
322 		.sync		= 0, /* hsync and vsync are active low */
337 		.sync = 0, /* hsync and vsync are active low */
342 	.ch[0] = {
354 	[0] = {
356 		.start	= 0xfe940000,
357 		.end	= 0xfe942fff,
361 		.start	= evt2irq(0xf40),
376 	.dev_id		= "gpio-backlight.0",
405 		{ /* [0] = mt9t112  */
406 			.flags		= 0,
408 			.bus_shift	= 0,
409 			.i2c_adapter_id	= 0,
410 			.i2c_address	= 0x3c,
413 			.flags		= 0,
415 			.bus_shift	= 0,
416 			.i2c_adapter_id	= 0,
417 			.i2c_address	= 0x45,
423 	[0] = {
425 		.start	= 0xfe910000,
426 		.end	= 0xfe91009f,
430 		.start  = evt2irq(0x880),
437 	.id             = 0, /* ceu.0 */
449 		{ /* [0] = mt9t112  */
450 			.flags		= 0,
452 			.bus_shift	= 0,
454 			.i2c_address	= 0x3c,
460 	[0] = {
462 		.start	= 0xfe914000,
463 		.end	= 0xfe91409f,
467 		.start  = evt2irq(0x9e0),
484 	.dev_id		= "0-0045",
491 	.dev_id		= "0-003c",
514 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
519 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
524 		I2C_BOARD_INFO("da7210", 0x1a),
527 		I2C_BOARD_INFO("tw9910", 0x45),
532 		I2C_BOARD_INFO("mt9t112", 0x3c),
539 		I2C_BOARD_INFO("r2025sd", 0x32),
542 		I2C_BOARD_INFO("lis3lv02d", 0x1c),
543 		.irq = evt2irq(0x620),
547 		I2C_BOARD_INFO("mt9t112", 0x3c),
558 	.keycodes	= { KEY_1, 0, 0, 0, 0,
559 			    KEY_2, 0, 0, 0, 0,
560 			    KEY_3, 0, 0, 0, 0,
561 			    KEY_4, 0, 0, 0, 0,
562 			    KEY_5, 0, 0, 0, 0,
563 			    KEY_6, 0, 0, 0, 0, },
567 	[0] = {
569 		.start  = 0x044b0000,
570 		.end    = 0x044b000f,
574 		.start  = evt2irq(0xbe0),
581 	.id             = 0, /* keysc0 clock */
590 #define IRQ0 evt2irq(0x600)
594 	int val = 0;  in ts_get_pendown_state()
604 	return val ? 0 : 1;  in ts_get_pendown_state()
610 	return 0;  in ts_init()
621 	I2C_BOARD_INFO("tsc2007", 0x48),
629 	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
630 	REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
651 	.id   = 0,
658 	.dev_id = "reg-fixed-voltage.0",
671 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
672 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
708 	.dev_id = "sh_mobile_sdhi.0",
724 	[0] = {
726 		.start  = 0x04ce0000,
727 		.end    = 0x04ce00ff,
731 		.start  = evt2irq(0xe80),
740 	.id             = 0,
765 	[0] = {
767 		.start  = 0x04cf0000,
768 		.end    = 0x04cf00ff,
772 		.start  = evt2irq(0x4e0),
793 	gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);  in mmc_spi_setpower()
804 	.dev_id = "mmc_spi.0", /* device "mmc_spi" @ CS0 */
807 		GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY7, NULL, 0,
831 	[0] = {
833 		.start	= 0xa4c40000,
834 		.end	= 0xa4c40063,
838 		.start	= evt2irq(0xc80),
845 	.id		= 0, /* MSIOF0 */
854 	.dev_id = "spi_sh_msiof.0",
865 	[0] = {
867 		.start	= 0xFE3C0000,
868 		.end	= 0xFE3C021d,
872 		.start  = evt2irq(0xf80),
879 	.id		= 0,
887 	.codec		= "da7210.0-001a",
888 	.platform	= "sh_fsi.0",
910 	[0] = {
912 		.start  = 0xA45D0000,
913 		.end    = 0xA45D0049,
917 		.start  = evt2irq(0x480),
936 	I2C_BOARD_INFO("ak8813", 0x20),
944 	.i2c_adap	= 0,
948 	[0] = {
949 		.start  = 0xfe960000,
950 		.end    = 0xfe962043,
954 		.start  = evt2irq(0x8e0),
972 	[0] = {
974 		.start	= 0xA4CA0000,
975 		.end	= 0xA4CA00FF,
980 		.start	= evt2irq(0x5a0),
985 		.start	= evt2irq(0x5c0),
991 	.sup_pclk	= 0, /* SH7724: Max Pclk/2 */
1000 	.id		= 0,
1043 #define EEPROM_ADDR 0x50
1050 	msg[0].addr  = EEPROM_ADDR;  in mac_read()
1051 	msg[0].flags = 0;  in mac_read()
1052 	msg[0].len   = 1;  in mac_read()
1053 	msg[0].buf   = &command;  in mac_read()
1061 	if (ret < 0) {  in mac_read()
1063 		buf = 0xff;  in mac_read()
1080 	for (i = 0; i < sizeof(pd->mac_addr); i++) {  in sh_eth_init()
1081 		pd->mac_addr[i] = mac_read(a, 0x10 + i);  in sh_eth_init()
1094 #define PORT_HIZA 0xA4050158
1095 #define IODRIVEA  0xA405018A
1129 	gpio_direction_output(GPIO_PTG0, 0);  in arch_setup()
1130 	gpio_direction_output(GPIO_PTG1, 0);  in arch_setup()
1131 	gpio_direction_output(GPIO_PTG2, 0);  in arch_setup()
1132 	gpio_direction_output(GPIO_PTG3, 0);  in arch_setup()
1133 	__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);  in arch_setup()
1153 	__raw_writew(0x0000, 0xA4D80000);  in arch_setup()
1154 	__raw_writew(0x0000, 0xA4D90000);  in arch_setup()
1159 	gpio_direction_output(GPIO_PTB4, 0);  in arch_setup()
1160 	gpio_direction_output(GPIO_PTB5, 0);  in arch_setup()
1161 	__raw_writew(0x0600, 0xa40501d4);  in arch_setup()
1162 	__raw_writew(0x0600, 0xa4050192);  in arch_setup()
1203 	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);  in arch_setup()
1209 	gpio_direction_output(GPIO_PTU1, 0);  in arch_setup()
1210 	gpio_direction_output(GPIO_PTA2, 0);  in arch_setup()
1213 	__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);  in arch_setup()
1218 		lcdc_info.ch[0].clock_divider		= 1;  in arch_setup()
1219 		lcdc_info.ch[0].lcd_modes		= ecovec_dvi_modes;  in arch_setup()
1220 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_dvi_modes);  in arch_setup()
1230 		lcdc_info.ch[0].clock_divider		= 2;  in arch_setup()
1231 		lcdc_info.ch[0].lcd_modes		= ecovec_lcd_modes;  in arch_setup()
1232 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_lcd_modes);  in arch_setup()
1244 		i2c_register_board_info(0, &ts_i2c_clients, 1);  in arch_setup()
1319 	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */  in arch_setup()
1356 		__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,  in arch_setup()
1387 	gpio_direction_output(GPIO_PTU0, 0);  in arch_setup()
1405 	gpio_direction_output(GPIO_PTU5, 0);  in arch_setup()
1413 	i2c_register_board_info(0, i2c0_devices,  in arch_setup()
1438 	gpio_direction_output(GPIO_PTG4, 0);  in arch_setup()
1445 	gpio_set_value(GPIO_PTU3, 0);  in arch_setup()
1454 	device_initialize(&ecovec_ceu_devices[0]->dev);  in arch_setup()
1455 	dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev,  in arch_setup()
1458 	platform_device_add(ecovec_ceu_devices[0]);  in arch_setup()
1489 	return 0;  in devices_setup()
1493 /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */