Lines Matching +full:64 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hardware-accelerated CRC-32 variants for Linux on z Systems
6 * computing of CRC-32 checksums.
8 * This CRC-32 implementation algorithm processes the most-significant
9 * bit first (BE).
17 #include "crc32-vx.h"
19 /* Vector register range containing CRC-32 constants */
28 * The CRC-32 constant block contains reduction constants to fold and
31 * For the CRC-32 variants, the constants are precomputed according to
34 * R1 = x4*128+64 mod P(x)
36 * R3 = x128+64 mod P(x)
41 * Barret reduction constant, u, is defined as floor(x**64 / P(x)).
52 * CRC-32 (IEEE 802.3 Ethernet, ...) polynomials:
68 * crc32_be_vgfm_16 - Compute CRC-32 (BE variant) with vector registers
72 * @size: Size of the buffer, must be 64 bytes or greater.
78 * V9..V14: CRC-32 constants.
82 /* Load CRC-32 constants */ in crc32_be_vgfm_16()
89 /* Load a 64-byte data chunk and XOR with CRC */ in crc32_be_vgfm_16()
92 buf += 64; in crc32_be_vgfm_16()
93 size -= 64; in crc32_be_vgfm_16()
95 while (size >= 64) { in crc32_be_vgfm_16()
96 /* Load the next 64-byte data chunk into V5 to V8 */ in crc32_be_vgfm_16()
110 buf += 64; in crc32_be_vgfm_16()
111 size -= 64; in crc32_be_vgfm_16()
114 /* Fold V1 to V4 into a single 128-bit value in V1 */ in crc32_be_vgfm_16()
123 size -= 16; in crc32_be_vgfm_16()
127 * The R5 constant is used to fold a 128-bit value into an 96-bit value in crc32_be_vgfm_16()
128 * that is XORed with the next 96-bit input data chunk. To use a single in crc32_be_vgfm_16()
129 * VGFMG instruction, multiply the rightmost 64-bit with x^32 (1<<32) to in crc32_be_vgfm_16()
130 * form an intermediate 96-bit value (with appended zeros) which is then in crc32_be_vgfm_16()
136 * Further reduce the remaining 96-bit value to a 64-bit value using a in crc32_be_vgfm_16()
139 * doubleword with R6. The result is a 64-bit value and is subject to in crc32_be_vgfm_16()
145 * The input values to the Barret reduction are the degree-63 polynomial in crc32_be_vgfm_16()
146 * in V1 (R(x)), degree-32 generator polynomial, and the reduction in crc32_be_vgfm_16()