Lines Matching +full:0 +full:x01a0
15 psw_t32 ipl_psw; /* 0x0000 */
16 struct ccw0 ccwpgm[2]; /* 0x0008 */
17 u8 fill[56]; /* 0x0018 */
18 struct ccw0 ccwpgmcc[20]; /* 0x0050 */
19 u8 pad_0xf0[0x01a0-0x00f0]; /* 0x00f0 */
20 psw_t restart_psw; /* 0x01a0 */
21 psw_t external_new_psw; /* 0x01b0 */
22 psw_t svc_new_psw; /* 0x01c0 */
23 psw_t program_new_psw; /* 0x01d0 */
24 psw_t mcck_new_psw; /* 0x01e0 */
25 psw_t io_new_psw; /* 0x01f0 */
30 * addresses 0-23 (a PSW and two CCWs). Bytes 24-79 are discarded.
31 * The next 160 bytes are loaded to addresses 0x18-0xb7. They form
33 * range 0x0f0-0x730 from the image to the range 0x0f0-0x730 in
34 * memory. At the end of the channel program the PSW at location 0 is
36 * Initial processing starts at 0x200 = iplstart.
44 * that to succeed the two initial CCWs, and the 0x40 fill bytes must
50 [ 0] = CCW0(CCW_CMD_READ_IPL, 0x018, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
51 [ 1] = CCW0(CCW_CMD_READ_IPL, 0x068, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
54 [ 0 ... 55] = 0x40,
57 [ 0] = CCW0(CCW_CMD_READ_IPL, 0x0f0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
58 [ 1] = CCW0(CCW_CMD_READ_IPL, 0x140, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
59 [ 2] = CCW0(CCW_CMD_READ_IPL, 0x190, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
60 [ 3] = CCW0(CCW_CMD_READ_IPL, 0x1e0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
61 [ 4] = CCW0(CCW_CMD_READ_IPL, 0x230, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
62 [ 5] = CCW0(CCW_CMD_READ_IPL, 0x280, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
63 [ 6] = CCW0(CCW_CMD_READ_IPL, 0x2d0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
64 [ 7] = CCW0(CCW_CMD_READ_IPL, 0x320, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
65 [ 8] = CCW0(CCW_CMD_READ_IPL, 0x370, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
66 [ 9] = CCW0(CCW_CMD_READ_IPL, 0x3c0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
67 [10] = CCW0(CCW_CMD_READ_IPL, 0x410, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
68 [11] = CCW0(CCW_CMD_READ_IPL, 0x460, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
69 [12] = CCW0(CCW_CMD_READ_IPL, 0x4b0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
70 [13] = CCW0(CCW_CMD_READ_IPL, 0x500, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
71 [14] = CCW0(CCW_CMD_READ_IPL, 0x550, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
72 [15] = CCW0(CCW_CMD_READ_IPL, 0x5a0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
73 [16] = CCW0(CCW_CMD_READ_IPL, 0x5f0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
74 [17] = CCW0(CCW_CMD_READ_IPL, 0x640, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
75 [18] = CCW0(CCW_CMD_READ_IPL, 0x690, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
76 [19] = CCW0(CCW_CMD_READ_IPL, 0x6e0, 0x50, CCW_FLAG_SLI),
78 .restart_psw = { .mask = 0, .addr = IPL_START, },