211 	unsigned long reg_val;  in kvm_riscv_vcpu_get_reg_config()  local
218 		reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK;  in kvm_riscv_vcpu_get_reg_config()
223 		reg_val = riscv_cbom_block_size;  in kvm_riscv_vcpu_get_reg_config()
228 		reg_val = riscv_cboz_block_size;  in kvm_riscv_vcpu_get_reg_config()
231 		reg_val = vcpu->arch.mvendorid;  in kvm_riscv_vcpu_get_reg_config()
234 		reg_val = vcpu->arch.marchid;  in kvm_riscv_vcpu_get_reg_config()
237 		reg_val = vcpu->arch.mimpid;  in kvm_riscv_vcpu_get_reg_config()
240 		reg_val = satp_mode >> SATP_MODE_SHIFT;  in kvm_riscv_vcpu_get_reg_config()
246 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_config()
260 	unsigned long i, isa_ext, reg_val;  in kvm_riscv_vcpu_set_reg_config()  local
265 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_config()
274 		if (fls(reg_val) >= RISCV_ISA_EXT_BASE)  in kvm_riscv_vcpu_set_reg_config()
281 		if (reg_val == (vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK))  in kvm_riscv_vcpu_set_reg_config()
289 					reg_val &= ~BIT(i);  in kvm_riscv_vcpu_set_reg_config()
293 					if (reg_val & BIT(i))  in kvm_riscv_vcpu_set_reg_config()
294 						reg_val &= ~BIT(i);  in kvm_riscv_vcpu_set_reg_config()
296 					if (!(reg_val & BIT(i)))  in kvm_riscv_vcpu_set_reg_config()
297 						reg_val |= BIT(i);  in kvm_riscv_vcpu_set_reg_config()
299 			reg_val &= riscv_isa_extension_base(NULL);  in kvm_riscv_vcpu_set_reg_config()
301 			reg_val = (vcpu->arch.isa[0] & ~KVM_RISCV_BASE_ISA_MASK) |  in kvm_riscv_vcpu_set_reg_config()
302 				  (reg_val & KVM_RISCV_BASE_ISA_MASK);  in kvm_riscv_vcpu_set_reg_config()
303 			vcpu->arch.isa[0] = reg_val;  in kvm_riscv_vcpu_set_reg_config()
312 		if (reg_val != riscv_cbom_block_size)  in kvm_riscv_vcpu_set_reg_config()
318 		if (reg_val != riscv_cboz_block_size)  in kvm_riscv_vcpu_set_reg_config()
322 		if (reg_val == vcpu->arch.mvendorid)  in kvm_riscv_vcpu_set_reg_config()
325 			vcpu->arch.mvendorid = reg_val;  in kvm_riscv_vcpu_set_reg_config()
330 		if (reg_val == vcpu->arch.marchid)  in kvm_riscv_vcpu_set_reg_config()
333 			vcpu->arch.marchid = reg_val;  in kvm_riscv_vcpu_set_reg_config()
338 		if (reg_val == vcpu->arch.mimpid)  in kvm_riscv_vcpu_set_reg_config()
341 			vcpu->arch.mimpid = reg_val;  in kvm_riscv_vcpu_set_reg_config()
346 		if (reg_val != (satp_mode >> SATP_MODE_SHIFT))  in kvm_riscv_vcpu_set_reg_config()
365 	unsigned long reg_val;  in kvm_riscv_vcpu_get_reg_core()  local
373 		reg_val = cntx->sepc;  in kvm_riscv_vcpu_get_reg_core()
376 		reg_val = ((unsigned long *)cntx)[reg_num];  in kvm_riscv_vcpu_get_reg_core()
378 		reg_val = (cntx->sstatus & SR_SPP) ?  in kvm_riscv_vcpu_get_reg_core()
383 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_core()
398 	unsigned long reg_val;  in kvm_riscv_vcpu_set_reg_core()  local
405 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_core()
409 		cntx->sepc = reg_val;  in kvm_riscv_vcpu_set_reg_core()
412 		((unsigned long *)cntx)[reg_num] = reg_val;  in kvm_riscv_vcpu_set_reg_core()
414 		if (reg_val == KVM_RISCV_MODE_S)  in kvm_riscv_vcpu_set_reg_core()
445 					  unsigned long reg_val)  in kvm_riscv_vcpu_general_set_csr()  argument
453 		reg_val &= VSIP_VALID_MASK;  in kvm_riscv_vcpu_general_set_csr()
454 		reg_val <<= VSIP_TO_HVIP_SHIFT;  in kvm_riscv_vcpu_general_set_csr()
457 	((unsigned long *)csr)[reg_num] = reg_val;  in kvm_riscv_vcpu_general_set_csr()
467 						   unsigned long reg_val)  in kvm_riscv_vcpu_smstateen_set_csr()  argument
475 	((unsigned long *)csr)[reg_num] = reg_val;  in kvm_riscv_vcpu_smstateen_set_csr()
502 	unsigned long reg_val, reg_subtype;  in kvm_riscv_vcpu_get_reg_csr()  local
511 		rc = kvm_riscv_vcpu_general_get_csr(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_csr()
514 		rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_csr()
520 							      &reg_val);  in kvm_riscv_vcpu_get_reg_csr()
529 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_csr()
544 	unsigned long reg_val, reg_subtype;  in kvm_riscv_vcpu_set_reg_csr()  local
549 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_csr()
556 		rc = kvm_riscv_vcpu_general_set_csr(vcpu, reg_num, reg_val);  in kvm_riscv_vcpu_set_reg_csr()
559 		rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val);  in kvm_riscv_vcpu_set_reg_csr()
565 							      reg_val);  in kvm_riscv_vcpu_set_reg_csr()
579 					 unsigned long *reg_val)  in riscv_vcpu_get_isa_ext_single()  argument
591 	*reg_val = 0;  in riscv_vcpu_get_isa_ext_single()
593 		*reg_val = 1; /* Mark the given extension as available */  in riscv_vcpu_get_isa_ext_single()
600 					 unsigned long reg_val)  in riscv_vcpu_set_isa_ext_single()  argument
612 	if (reg_val == test_bit(host_isa_ext, vcpu->arch.isa))  in riscv_vcpu_set_isa_ext_single()
620 		if (reg_val == 1 &&  in riscv_vcpu_set_isa_ext_single()
623 		else if (!reg_val &&  in riscv_vcpu_set_isa_ext_single()
638 					unsigned long *reg_val)  in riscv_vcpu_get_isa_ext_multi()  argument
653 			*reg_val |= KVM_REG_RISCV_ISA_MULTI_MASK(ext_id);  in riscv_vcpu_get_isa_ext_multi()
661 					unsigned long reg_val, bool enable)  in riscv_vcpu_set_isa_ext_multi()  argument
668 	for_each_set_bit(i, &reg_val, BITS_PER_LONG) {  in riscv_vcpu_set_isa_ext_multi()
688 	unsigned long reg_val, reg_subtype;  in kvm_riscv_vcpu_get_reg_isa_ext()  local
696 	reg_val = 0;  in kvm_riscv_vcpu_get_reg_isa_ext()
699 		rc = riscv_vcpu_get_isa_ext_single(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_isa_ext()
703 		rc = riscv_vcpu_get_isa_ext_multi(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_isa_ext()
705 			reg_val = ~reg_val;  in kvm_riscv_vcpu_get_reg_isa_ext()
713 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_isa_ext()
727 	unsigned long reg_val, reg_subtype;  in kvm_riscv_vcpu_set_reg_isa_ext()  local
735 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_isa_ext()
740 		return riscv_vcpu_set_isa_ext_single(vcpu, reg_num, reg_val);  in kvm_riscv_vcpu_set_reg_isa_ext()
742 		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, true);  in kvm_riscv_vcpu_set_reg_isa_ext()
744 		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false);  in kvm_riscv_vcpu_set_reg_isa_ext()