208 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_config()  local
216 	switch (reg_num) {  in kvm_riscv_vcpu_get_reg_config()
257 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_config()  local
268 	switch (reg_num) {  in kvm_riscv_vcpu_set_reg_config()
362 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_core()  local
369 	if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))  in kvm_riscv_vcpu_get_reg_core()
372 	if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))  in kvm_riscv_vcpu_get_reg_core()
374 	else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&  in kvm_riscv_vcpu_get_reg_core()
375 		 reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))  in kvm_riscv_vcpu_get_reg_core()
376 		reg_val = ((unsigned long *)cntx)[reg_num];  in kvm_riscv_vcpu_get_reg_core()
377 	else if (reg_num == KVM_REG_RISCV_CORE_REG(mode))  in kvm_riscv_vcpu_get_reg_core()
395 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_core()  local
402 	if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))  in kvm_riscv_vcpu_set_reg_core()
408 	if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))  in kvm_riscv_vcpu_set_reg_core()
410 	else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&  in kvm_riscv_vcpu_set_reg_core()
411 		 reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))  in kvm_riscv_vcpu_set_reg_core()
412 		((unsigned long *)cntx)[reg_num] = reg_val;  in kvm_riscv_vcpu_set_reg_core()
413 	else if (reg_num == KVM_REG_RISCV_CORE_REG(mode)) {  in kvm_riscv_vcpu_set_reg_core()
425 					  unsigned long reg_num,  in kvm_riscv_vcpu_general_get_csr()  argument
430 	if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))  in kvm_riscv_vcpu_general_get_csr()
433 	if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {  in kvm_riscv_vcpu_general_get_csr()
438 		*out_val = ((unsigned long *)csr)[reg_num];  in kvm_riscv_vcpu_general_get_csr()
444 					  unsigned long reg_num,  in kvm_riscv_vcpu_general_set_csr()  argument
449 	if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))  in kvm_riscv_vcpu_general_set_csr()
452 	if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {  in kvm_riscv_vcpu_general_set_csr()
457 	((unsigned long *)csr)[reg_num] = reg_val;  in kvm_riscv_vcpu_general_set_csr()
459 	if (reg_num == KVM_REG_RISCV_CSR_REG(sip))  in kvm_riscv_vcpu_general_set_csr()
466 						   unsigned long reg_num,  in kvm_riscv_vcpu_smstateen_set_csr()  argument
471 	if (reg_num >= sizeof(struct kvm_riscv_smstateen_csr) /  in kvm_riscv_vcpu_smstateen_set_csr()
475 	((unsigned long *)csr)[reg_num] = reg_val;  in kvm_riscv_vcpu_smstateen_set_csr()
480 					    unsigned long reg_num,  in kvm_riscv_vcpu_smstateen_get_csr()  argument
485 	if (reg_num >= sizeof(struct kvm_riscv_smstateen_csr) /  in kvm_riscv_vcpu_smstateen_get_csr()
489 	*out_val = ((unsigned long *)csr)[reg_num];  in kvm_riscv_vcpu_smstateen_get_csr()
499 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_csr()  local
507 	reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_get_reg_csr()
508 	reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_get_reg_csr()
511 		rc = kvm_riscv_vcpu_general_get_csr(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_csr()
514 		rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_csr()
519 			rc = kvm_riscv_vcpu_smstateen_get_csr(vcpu, reg_num,  in kvm_riscv_vcpu_get_reg_csr()
541 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_csr()  local
552 	reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_set_reg_csr()
553 	reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_set_reg_csr()
556 		rc = kvm_riscv_vcpu_general_set_csr(vcpu, reg_num, reg_val);  in kvm_riscv_vcpu_set_reg_csr()
559 		rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val);  in kvm_riscv_vcpu_set_reg_csr()
564 			rc = kvm_riscv_vcpu_smstateen_set_csr(vcpu, reg_num,  in kvm_riscv_vcpu_set_reg_csr()
578 					 unsigned long reg_num,  in riscv_vcpu_get_isa_ext_single()  argument
583 	if (reg_num >= KVM_RISCV_ISA_EXT_MAX ||  in riscv_vcpu_get_isa_ext_single()
584 	    reg_num >= ARRAY_SIZE(kvm_isa_ext_arr))  in riscv_vcpu_get_isa_ext_single()
587 	host_isa_ext = kvm_isa_ext_arr[reg_num];  in riscv_vcpu_get_isa_ext_single()
599 					 unsigned long reg_num,  in riscv_vcpu_set_isa_ext_single()  argument
604 	if (reg_num >= KVM_RISCV_ISA_EXT_MAX ||  in riscv_vcpu_set_isa_ext_single()
605 	    reg_num >= ARRAY_SIZE(kvm_isa_ext_arr))  in riscv_vcpu_set_isa_ext_single()
608 	host_isa_ext = kvm_isa_ext_arr[reg_num];  in riscv_vcpu_set_isa_ext_single()
621 		    kvm_riscv_vcpu_isa_enable_allowed(reg_num))  in riscv_vcpu_set_isa_ext_single()
624 			 kvm_riscv_vcpu_isa_disable_allowed(reg_num))  in riscv_vcpu_set_isa_ext_single()
637 					unsigned long reg_num,  in riscv_vcpu_get_isa_ext_multi()  argument
642 	if (reg_num > KVM_REG_RISCV_ISA_MULTI_REG_LAST)  in riscv_vcpu_get_isa_ext_multi()
646 		ext_id = i + reg_num * BITS_PER_LONG;  in riscv_vcpu_get_isa_ext_multi()
660 					unsigned long reg_num,  in riscv_vcpu_set_isa_ext_multi()  argument
665 	if (reg_num > KVM_REG_RISCV_ISA_MULTI_REG_LAST)  in riscv_vcpu_set_isa_ext_multi()
669 		ext_id = i + reg_num * BITS_PER_LONG;  in riscv_vcpu_set_isa_ext_multi()
685 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_isa_ext()  local
693 	reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_get_reg_isa_ext()
694 	reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_get_reg_isa_ext()
699 		rc = riscv_vcpu_get_isa_ext_single(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_isa_ext()
703 		rc = riscv_vcpu_get_isa_ext_multi(vcpu, reg_num, &reg_val);  in kvm_riscv_vcpu_get_reg_isa_ext()
724 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_isa_ext()  local
732 	reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_set_reg_isa_ext()
733 	reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;  in kvm_riscv_vcpu_set_reg_isa_ext()
740 		return riscv_vcpu_set_isa_ext_single(vcpu, reg_num, reg_val);  in kvm_riscv_vcpu_set_reg_isa_ext()
742 		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, true);  in kvm_riscv_vcpu_set_reg_isa_ext()
744 		return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false);  in kvm_riscv_vcpu_set_reg_isa_ext()