Lines Matching +full:cpu +full:- +full:cfg
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/entry-kvm.h>
51 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_reset_vcpu()
52 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr; in kvm_riscv_reset_vcpu()
53 struct kvm_cpu_context *cntx = &vcpu->arch.guest_context; in kvm_riscv_reset_vcpu()
54 struct kvm_cpu_context *reset_cntx = &vcpu->arch.guest_reset_context; in kvm_riscv_reset_vcpu()
63 loaded = (vcpu->cpu != -1); in kvm_riscv_reset_vcpu()
67 vcpu->arch.last_exit_cpu = -1; in kvm_riscv_reset_vcpu()
71 spin_lock(&vcpu->arch.reset_cntx_lock); in kvm_riscv_reset_vcpu()
73 spin_unlock(&vcpu->arch.reset_cntx_lock); in kvm_riscv_reset_vcpu()
83 bitmap_zero(vcpu->arch.irqs_pending, KVM_RISCV_VCPU_NR_IRQS); in kvm_riscv_reset_vcpu()
84 bitmap_zero(vcpu->arch.irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS); in kvm_riscv_reset_vcpu()
88 vcpu->arch.hfence_head = 0; in kvm_riscv_reset_vcpu()
89 vcpu->arch.hfence_tail = 0; in kvm_riscv_reset_vcpu()
90 memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue)); in kvm_riscv_reset_vcpu()
109 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr; in kvm_arch_vcpu_create()
111 spin_lock_init(&vcpu->arch.mp_state_lock); in kvm_arch_vcpu_create()
114 vcpu->arch.ran_atleast_once = false; in kvm_arch_vcpu_create()
115 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO; in kvm_arch_vcpu_create()
116 bitmap_zero(vcpu->arch.isa, RISCV_ISA_EXT_MAX); in kvm_arch_vcpu_create()
122 vcpu->arch.mvendorid = sbi_get_mvendorid(); in kvm_arch_vcpu_create()
123 vcpu->arch.marchid = sbi_get_marchid(); in kvm_arch_vcpu_create()
124 vcpu->arch.mimpid = sbi_get_mimpid(); in kvm_arch_vcpu_create()
127 spin_lock_init(&vcpu->arch.hfence_lock); in kvm_arch_vcpu_create()
130 spin_lock_init(&vcpu->arch.reset_cntx_lock); in kvm_arch_vcpu_create()
132 spin_lock(&vcpu->arch.reset_cntx_lock); in kvm_arch_vcpu_create()
133 cntx = &vcpu->arch.guest_reset_context; in kvm_arch_vcpu_create()
134 cntx->sstatus = SR_SPP | SR_SPIE; in kvm_arch_vcpu_create()
135 cntx->hstatus = 0; in kvm_arch_vcpu_create()
136 cntx->hstatus |= HSTATUS_VTW; in kvm_arch_vcpu_create()
137 cntx->hstatus |= HSTATUS_SPVP; in kvm_arch_vcpu_create()
138 cntx->hstatus |= HSTATUS_SPV; in kvm_arch_vcpu_create()
139 spin_unlock(&vcpu->arch.reset_cntx_lock); in kvm_arch_vcpu_create()
142 return -ENOMEM; in kvm_arch_vcpu_create()
145 reset_csr->scounteren = 0x7; in kvm_arch_vcpu_create()
173 * vcpu with id 0 is the designated boot cpu. in kvm_arch_vcpu_postcreate()
174 * Keep all vcpus with non-zero id in power-off state so that in kvm_arch_vcpu_postcreate()
177 if (vcpu->vcpu_idx != 0) in kvm_arch_vcpu_postcreate()
191 /* Free unused pages pre-allocated for G-stage page table mappings */ in kvm_arch_vcpu_destroy()
192 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); in kvm_arch_vcpu_destroy()
215 return (kvm_riscv_vcpu_has_interrupts(vcpu, -1UL) && in kvm_arch_vcpu_runnable()
216 !kvm_riscv_vcpu_stopped(vcpu) && !vcpu->arch.pause); in kvm_arch_vcpu_runnable()
226 return (vcpu->arch.guest_context.sstatus & SR_SPP) ? true : false; in kvm_arch_vcpu_in_kernel()
237 struct kvm_vcpu *vcpu = filp->private_data; in kvm_arch_vcpu_async_ioctl()
244 return -EFAULT; in kvm_arch_vcpu_async_ioctl()
252 return -ENOIOCTLCMD; in kvm_arch_vcpu_async_ioctl()
258 struct kvm_vcpu *vcpu = filp->private_data; in kvm_arch_vcpu_ioctl()
260 long r = -EINVAL; in kvm_arch_vcpu_ioctl()
267 r = -EFAULT; in kvm_arch_vcpu_ioctl()
282 r = -EFAULT; in kvm_arch_vcpu_ioctl()
289 r = -E2BIG; in kvm_arch_vcpu_ioctl()
292 r = kvm_riscv_vcpu_copy_reg_indices(vcpu, user_list->reg); in kvm_arch_vcpu_ioctl()
305 return -EINVAL; in kvm_arch_vcpu_ioctl_get_sregs()
311 return -EINVAL; in kvm_arch_vcpu_ioctl_set_sregs()
316 return -EINVAL; in kvm_arch_vcpu_ioctl_get_fpu()
321 return -EINVAL; in kvm_arch_vcpu_ioctl_set_fpu()
327 return -EINVAL; in kvm_arch_vcpu_ioctl_translate()
332 return -EINVAL; in kvm_arch_vcpu_ioctl_get_regs()
337 return -EINVAL; in kvm_arch_vcpu_ioctl_set_regs()
342 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_flush_interrupts()
345 if (READ_ONCE(vcpu->arch.irqs_pending_mask[0])) { in kvm_riscv_vcpu_flush_interrupts()
346 mask = xchg_acquire(&vcpu->arch.irqs_pending_mask[0], 0); in kvm_riscv_vcpu_flush_interrupts()
347 val = READ_ONCE(vcpu->arch.irqs_pending[0]) & mask; in kvm_riscv_vcpu_flush_interrupts()
349 csr->hvip &= ~mask; in kvm_riscv_vcpu_flush_interrupts()
350 csr->hvip |= val; in kvm_riscv_vcpu_flush_interrupts()
360 struct kvm_vcpu_arch *v = &vcpu->arch; in kvm_riscv_vcpu_sync_interrupts()
361 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_sync_interrupts()
364 csr->vsie = csr_read(CSR_VSIE); in kvm_riscv_vcpu_sync_interrupts()
366 /* Sync-up HVIP.VSSIP bit changes does by Guest */ in kvm_riscv_vcpu_sync_interrupts()
368 if ((csr->hvip ^ hvip) & (1UL << IRQ_VS_SOFT)) { in kvm_riscv_vcpu_sync_interrupts()
371 v->irqs_pending_mask)) in kvm_riscv_vcpu_sync_interrupts()
372 set_bit(IRQ_VS_SOFT, v->irqs_pending); in kvm_riscv_vcpu_sync_interrupts()
375 v->irqs_pending_mask)) in kvm_riscv_vcpu_sync_interrupts()
376 clear_bit(IRQ_VS_SOFT, v->irqs_pending); in kvm_riscv_vcpu_sync_interrupts()
381 if ((csr->hvip ^ hvip) & (1UL << IRQ_PMU_OVF)) { in kvm_riscv_vcpu_sync_interrupts()
383 !test_and_set_bit(IRQ_PMU_OVF, v->irqs_pending_mask)) in kvm_riscv_vcpu_sync_interrupts()
384 clear_bit(IRQ_PMU_OVF, v->irqs_pending); in kvm_riscv_vcpu_sync_interrupts()
387 /* Sync-up AIA high interrupts */ in kvm_riscv_vcpu_sync_interrupts()
390 /* Sync-up timer CSRs */ in kvm_riscv_vcpu_sync_interrupts()
397 * We only allow VS-mode software, timer, and external in kvm_riscv_vcpu_set_interrupt()
399 * defined by RISC-V privilege specification. in kvm_riscv_vcpu_set_interrupt()
406 return -EINVAL; in kvm_riscv_vcpu_set_interrupt()
408 set_bit(irq, vcpu->arch.irqs_pending); in kvm_riscv_vcpu_set_interrupt()
410 set_bit(irq, vcpu->arch.irqs_pending_mask); in kvm_riscv_vcpu_set_interrupt()
420 * We only allow VS-mode software, timer, counter overflow and external in kvm_riscv_vcpu_unset_interrupt()
422 * defined by RISC-V privilege specification. in kvm_riscv_vcpu_unset_interrupt()
429 return -EINVAL; in kvm_riscv_vcpu_unset_interrupt()
431 clear_bit(irq, vcpu->arch.irqs_pending); in kvm_riscv_vcpu_unset_interrupt()
433 set_bit(irq, vcpu->arch.irqs_pending_mask); in kvm_riscv_vcpu_unset_interrupt()
442 ie = ((vcpu->arch.guest_csr.vsie & VSIP_VALID_MASK) in kvm_riscv_vcpu_has_interrupts()
444 ie |= vcpu->arch.guest_csr.vsie & ~IRQ_LOCAL_MASK & in kvm_riscv_vcpu_has_interrupts()
446 if (READ_ONCE(vcpu->arch.irqs_pending[0]) & ie) in kvm_riscv_vcpu_has_interrupts()
455 WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED); in __kvm_riscv_vcpu_power_off()
462 spin_lock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_off()
464 spin_unlock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_off()
469 WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_RUNNABLE); in __kvm_riscv_vcpu_power_on()
475 spin_lock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_on()
477 spin_unlock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_on()
482 return READ_ONCE(vcpu->arch.mp_state.mp_state) == KVM_MP_STATE_STOPPED; in kvm_riscv_vcpu_stopped()
488 *mp_state = READ_ONCE(vcpu->arch.mp_state); in kvm_arch_vcpu_ioctl_get_mpstate()
498 spin_lock(&vcpu->arch.mp_state_lock); in kvm_arch_vcpu_ioctl_set_mpstate()
500 switch (mp_state->mp_state) { in kvm_arch_vcpu_ioctl_set_mpstate()
502 WRITE_ONCE(vcpu->arch.mp_state, *mp_state); in kvm_arch_vcpu_ioctl_set_mpstate()
508 ret = -EINVAL; in kvm_arch_vcpu_ioctl_set_mpstate()
511 spin_unlock(&vcpu->arch.mp_state_lock); in kvm_arch_vcpu_ioctl_set_mpstate()
519 if (dbg->control & KVM_GUESTDBG_ENABLE) { in kvm_arch_vcpu_ioctl_set_guest_debug()
520 vcpu->guest_debug = dbg->control; in kvm_arch_vcpu_ioctl_set_guest_debug()
521 vcpu->arch.cfg.hedeleg &= ~BIT(EXC_BREAKPOINT); in kvm_arch_vcpu_ioctl_set_guest_debug()
523 vcpu->guest_debug = 0; in kvm_arch_vcpu_ioctl_set_guest_debug()
524 vcpu->arch.cfg.hedeleg |= BIT(EXC_BREAKPOINT); in kvm_arch_vcpu_ioctl_set_guest_debug()
532 const unsigned long *isa = vcpu->arch.isa; in kvm_riscv_vcpu_setup_config()
533 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_riscv_vcpu_setup_config() local
536 cfg->henvcfg |= ENVCFG_PBMTE; in kvm_riscv_vcpu_setup_config()
539 cfg->henvcfg |= ENVCFG_STCE; in kvm_riscv_vcpu_setup_config()
542 cfg->henvcfg |= (ENVCFG_CBIE | ENVCFG_CBCFE); in kvm_riscv_vcpu_setup_config()
545 cfg->henvcfg |= ENVCFG_CBZE; in kvm_riscv_vcpu_setup_config()
548 cfg->hstateen0 |= SMSTATEEN0_HSENVCFG; in kvm_riscv_vcpu_setup_config()
550 cfg->hstateen0 |= SMSTATEEN0_AIA_IMSIC | in kvm_riscv_vcpu_setup_config()
554 cfg->hstateen0 |= SMSTATEEN0_SSTATEEN0; in kvm_riscv_vcpu_setup_config()
557 cfg->hedeleg = KVM_HEDELEG_DEFAULT; in kvm_riscv_vcpu_setup_config()
558 if (vcpu->guest_debug) in kvm_riscv_vcpu_setup_config()
559 cfg->hedeleg &= ~BIT(EXC_BREAKPOINT); in kvm_riscv_vcpu_setup_config()
562 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) in kvm_arch_vcpu_load() argument
564 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_arch_vcpu_load()
565 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_arch_vcpu_load() local
567 csr_write(CSR_VSSTATUS, csr->vsstatus); in kvm_arch_vcpu_load()
568 csr_write(CSR_VSIE, csr->vsie); in kvm_arch_vcpu_load()
569 csr_write(CSR_VSTVEC, csr->vstvec); in kvm_arch_vcpu_load()
570 csr_write(CSR_VSSCRATCH, csr->vsscratch); in kvm_arch_vcpu_load()
571 csr_write(CSR_VSEPC, csr->vsepc); in kvm_arch_vcpu_load()
572 csr_write(CSR_VSCAUSE, csr->vscause); in kvm_arch_vcpu_load()
573 csr_write(CSR_VSTVAL, csr->vstval); in kvm_arch_vcpu_load()
574 csr_write(CSR_HEDELEG, cfg->hedeleg); in kvm_arch_vcpu_load()
575 csr_write(CSR_HVIP, csr->hvip); in kvm_arch_vcpu_load()
576 csr_write(CSR_VSATP, csr->vsatp); in kvm_arch_vcpu_load()
577 csr_write(CSR_HENVCFG, cfg->henvcfg); in kvm_arch_vcpu_load()
579 csr_write(CSR_HENVCFGH, cfg->henvcfg >> 32); in kvm_arch_vcpu_load()
581 csr_write(CSR_HSTATEEN0, cfg->hstateen0); in kvm_arch_vcpu_load()
583 csr_write(CSR_HSTATEEN0H, cfg->hstateen0 >> 32); in kvm_arch_vcpu_load()
590 kvm_riscv_vcpu_host_fp_save(&vcpu->arch.host_context); in kvm_arch_vcpu_load()
591 kvm_riscv_vcpu_guest_fp_restore(&vcpu->arch.guest_context, in kvm_arch_vcpu_load()
592 vcpu->arch.isa); in kvm_arch_vcpu_load()
593 kvm_riscv_vcpu_host_vector_save(&vcpu->arch.host_context); in kvm_arch_vcpu_load()
594 kvm_riscv_vcpu_guest_vector_restore(&vcpu->arch.guest_context, in kvm_arch_vcpu_load()
595 vcpu->arch.isa); in kvm_arch_vcpu_load()
597 kvm_riscv_vcpu_aia_load(vcpu, cpu); in kvm_arch_vcpu_load()
601 vcpu->cpu = cpu; in kvm_arch_vcpu_load()
606 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_arch_vcpu_put()
608 vcpu->cpu = -1; in kvm_arch_vcpu_put()
612 kvm_riscv_vcpu_guest_fp_save(&vcpu->arch.guest_context, in kvm_arch_vcpu_put()
613 vcpu->arch.isa); in kvm_arch_vcpu_put()
614 kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context); in kvm_arch_vcpu_put()
617 kvm_riscv_vcpu_guest_vector_save(&vcpu->arch.guest_context, in kvm_arch_vcpu_put()
618 vcpu->arch.isa); in kvm_arch_vcpu_put()
619 kvm_riscv_vcpu_host_vector_restore(&vcpu->arch.host_context); in kvm_arch_vcpu_put()
621 csr->vsstatus = csr_read(CSR_VSSTATUS); in kvm_arch_vcpu_put()
622 csr->vsie = csr_read(CSR_VSIE); in kvm_arch_vcpu_put()
623 csr->vstvec = csr_read(CSR_VSTVEC); in kvm_arch_vcpu_put()
624 csr->vsscratch = csr_read(CSR_VSSCRATCH); in kvm_arch_vcpu_put()
625 csr->vsepc = csr_read(CSR_VSEPC); in kvm_arch_vcpu_put()
626 csr->vscause = csr_read(CSR_VSCAUSE); in kvm_arch_vcpu_put()
627 csr->vstval = csr_read(CSR_VSTVAL); in kvm_arch_vcpu_put()
628 csr->hvip = csr_read(CSR_HVIP); in kvm_arch_vcpu_put()
629 csr->vsatp = csr_read(CSR_VSATP); in kvm_arch_vcpu_put()
640 (!kvm_riscv_vcpu_stopped(vcpu)) && (!vcpu->arch.pause), in kvm_riscv_check_vcpu_requests()
644 if (kvm_riscv_vcpu_stopped(vcpu) || vcpu->arch.pause) { in kvm_riscv_check_vcpu_requests()
682 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_update_hvip()
684 csr_write(CSR_HVIP, csr->hvip); in kvm_riscv_update_hvip()
690 struct kvm_vcpu_smstateen_csr *smcsr = &vcpu->arch.smstateen_csr; in kvm_riscv_vcpu_swap_in_guest_state()
691 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_swap_in_guest_state()
692 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_riscv_vcpu_swap_in_guest_state() local
694 vcpu->arch.host_senvcfg = csr_swap(CSR_SENVCFG, csr->senvcfg); in kvm_riscv_vcpu_swap_in_guest_state()
696 (cfg->hstateen0 & SMSTATEEN0_SSTATEEN0)) in kvm_riscv_vcpu_swap_in_guest_state()
697 vcpu->arch.host_sstateen0 = csr_swap(CSR_SSTATEEN0, in kvm_riscv_vcpu_swap_in_guest_state()
698 smcsr->sstateen0); in kvm_riscv_vcpu_swap_in_guest_state()
703 struct kvm_vcpu_smstateen_csr *smcsr = &vcpu->arch.smstateen_csr; in kvm_riscv_vcpu_swap_in_host_state()
704 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_swap_in_host_state()
705 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_riscv_vcpu_swap_in_host_state() local
707 csr->senvcfg = csr_swap(CSR_SENVCFG, vcpu->arch.host_senvcfg); in kvm_riscv_vcpu_swap_in_host_state()
709 (cfg->hstateen0 & SMSTATEEN0_SSTATEEN0)) in kvm_riscv_vcpu_swap_in_host_state()
710 smcsr->sstateen0 = csr_swap(CSR_SSTATEEN0, in kvm_riscv_vcpu_swap_in_host_state()
711 vcpu->arch.host_sstateen0); in kvm_riscv_vcpu_swap_in_host_state()
725 __kvm_riscv_switch_to(&vcpu->arch); in kvm_riscv_vcpu_enter_exit()
726 vcpu->arch.last_exit_cpu = vcpu->cpu; in kvm_riscv_vcpu_enter_exit()
735 struct kvm_run *run = vcpu->run; in kvm_arch_vcpu_ioctl_run()
737 if (!vcpu->arch.ran_atleast_once) in kvm_arch_vcpu_ioctl_run()
741 vcpu->arch.ran_atleast_once = true; in kvm_arch_vcpu_ioctl_run()
745 switch (run->exit_reason) { in kvm_arch_vcpu_ioctl_run()
747 /* Process MMIO value returned from user-space */ in kvm_arch_vcpu_ioctl_run()
748 ret = kvm_riscv_vcpu_mmio_return(vcpu, vcpu->run); in kvm_arch_vcpu_ioctl_run()
751 /* Process SBI value returned from user-space */ in kvm_arch_vcpu_ioctl_run()
752 ret = kvm_riscv_vcpu_sbi_return(vcpu, vcpu->run); in kvm_arch_vcpu_ioctl_run()
755 /* Process CSR value returned from user-space */ in kvm_arch_vcpu_ioctl_run()
756 ret = kvm_riscv_vcpu_csr_return(vcpu, vcpu->run); in kvm_arch_vcpu_ioctl_run()
767 if (!vcpu->wants_to_run) { in kvm_arch_vcpu_ioctl_run()
769 return -EINTR; in kvm_arch_vcpu_ioctl_run()
777 run->exit_reason = KVM_EXIT_UNKNOWN; in kvm_arch_vcpu_ioctl_run()
804 * Documentation/virt/kvm/vcpu-requests.rst in kvm_arch_vcpu_ioctl_run()
806 vcpu->mode = IN_GUEST_MODE; in kvm_arch_vcpu_ioctl_run()
817 /* Update HVIP CSR for current CPU */ in kvm_arch_vcpu_ioctl_run()
820 if (kvm_riscv_gstage_vmid_ver_changed(&vcpu->kvm->arch.vmid) || in kvm_arch_vcpu_ioctl_run()
823 vcpu->mode = OUTSIDE_GUEST_MODE; in kvm_arch_vcpu_ioctl_run()
833 * Note: This should be done after G-stage VMID has been in kvm_arch_vcpu_ioctl_run()
844 vcpu->mode = OUTSIDE_GUEST_MODE; in kvm_arch_vcpu_ioctl_run()
845 vcpu->stat.exits++; in kvm_arch_vcpu_ioctl_run()
852 trap.sepc = vcpu->arch.guest_context.sepc; in kvm_arch_vcpu_ioctl_run()
868 * recognised, so we just hope that the CPU takes any pending in kvm_arch_vcpu_ioctl_run()