Lines Matching +full:riscv +full:- +full:aia
1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/irqchip/riscv-imsic.h>
44 * 1) Hardware: IMSIC VS-file (vsfile_cpu >= 0)
45 * 2) Software: IMSIC SW-file (vsfile_cpu < 0)
48 /* IMSIC VS-file */
55 /* IMSIC SW-file */
243 imsic_mrif_atomic_rmw(__mrif, __ptr, __new_val, -1UL)
253 &mrif->eithreshold); in imsic_mrif_topei()
258 eix = &mrif->eix[ei]; in imsic_mrif_topei()
259 eipend[0] = imsic_mrif_atomic_read(mrif, &eix->eie[0]) & in imsic_mrif_topei()
260 imsic_mrif_atomic_read(mrif, &eix->eip[0]); in imsic_mrif_topei()
262 eipend[1] = imsic_mrif_atomic_read(mrif, &eix->eie[1]) & in imsic_mrif_topei()
263 imsic_mrif_atomic_read(mrif, &eix->eip[1]); in imsic_mrif_topei()
274 if (test_bit(i - imin, eipend)) in imsic_mrif_topei()
291 num = isel - IMSIC_EIP0; in imsic_mrif_isel_check()
294 num = isel - IMSIC_EIE0; in imsic_mrif_isel_check()
297 return -ENOENT; in imsic_mrif_isel_check()
301 return -EINVAL; in imsic_mrif_isel_check()
304 return -EINVAL; in imsic_mrif_isel_check()
319 old_val = imsic_mrif_atomic_rmw(mrif, &mrif->eidelivery, in imsic_mrif_rmw()
323 old_val = imsic_mrif_atomic_rmw(mrif, &mrif->eithreshold, in imsic_mrif_rmw()
324 new_val, wr_mask & (IMSIC_MAX_ID - 1)); in imsic_mrif_rmw()
330 num = isel - IMSIC_EIP0; in imsic_mrif_rmw()
333 num = isel - IMSIC_EIE0; in imsic_mrif_rmw()
337 return -EINVAL; in imsic_mrif_rmw()
338 eix = &mrif->eix[num / 2]; in imsic_mrif_rmw()
342 return -EINVAL; in imsic_mrif_rmw()
343 ei = (pend) ? &eix->eip[0] : &eix->eie[0]; in imsic_mrif_rmw()
345 ei = (pend) ? &eix->eip[num & 0x1] : &eix->eie[num & 0x1]; in imsic_mrif_rmw()
348 /* Bit0 of EIP0 or EIE0 is read-only */ in imsic_mrif_rmw()
355 return -ENOENT; in imsic_mrif_rmw()
376 struct imsic_mrif *mrif = idata->mrif; in imsic_vsfile_local_read()
382 new_hstatus |= ((unsigned long)idata->hgei) << HSTATUS_VGEIN_SHIFT; in imsic_vsfile_local_read()
391 if (idata->clear) { in imsic_vsfile_local_read()
392 mrif->eidelivery = imsic_vs_csr_swap(IMSIC_EIDELIVERY, 0); in imsic_vsfile_local_read()
393 mrif->eithreshold = imsic_vs_csr_swap(IMSIC_EITHRESHOLD, 0); in imsic_vsfile_local_read()
394 for (i = 0; i < idata->nr_eix; i++) { in imsic_vsfile_local_read()
395 eix = &mrif->eix[i]; in imsic_vsfile_local_read()
396 eix->eip[0] = imsic_eix_swap(IMSIC_EIP0 + i * 2, 0); in imsic_vsfile_local_read()
397 eix->eie[0] = imsic_eix_swap(IMSIC_EIE0 + i * 2, 0); in imsic_vsfile_local_read()
399 eix->eip[1] = imsic_eix_swap(IMSIC_EIP0 + i * 2 + 1, 0); in imsic_vsfile_local_read()
400 eix->eie[1] = imsic_eix_swap(IMSIC_EIE0 + i * 2 + 1, 0); in imsic_vsfile_local_read()
404 mrif->eidelivery = imsic_vs_csr_read(IMSIC_EIDELIVERY); in imsic_vsfile_local_read()
405 mrif->eithreshold = imsic_vs_csr_read(IMSIC_EITHRESHOLD); in imsic_vsfile_local_read()
406 for (i = 0; i < idata->nr_eix; i++) { in imsic_vsfile_local_read()
407 eix = &mrif->eix[i]; in imsic_vsfile_local_read()
408 eix->eip[0] = imsic_eix_read(IMSIC_EIP0 + i * 2); in imsic_vsfile_local_read()
409 eix->eie[0] = imsic_eix_read(IMSIC_EIE0 + i * 2); in imsic_vsfile_local_read()
411 eix->eip[1] = imsic_eix_read(IMSIC_EIP0 + i * 2 + 1); in imsic_vsfile_local_read()
412 eix->eie[1] = imsic_eix_read(IMSIC_EIE0 + i * 2 + 1); in imsic_vsfile_local_read()
426 /* We can only read clear if we have a IMSIC VS-file */ in imsic_vsfile_read()
454 new_hstatus |= ((unsigned long)idata->hgei) << HSTATUS_VGEIN_SHIFT; in imsic_vsfile_local_rw()
457 switch (idata->isel) { in imsic_vsfile_local_rw()
459 if (idata->write) in imsic_vsfile_local_rw()
460 imsic_vs_csr_write(IMSIC_EIDELIVERY, idata->val); in imsic_vsfile_local_rw()
462 idata->val = imsic_vs_csr_read(IMSIC_EIDELIVERY); in imsic_vsfile_local_rw()
465 if (idata->write) in imsic_vsfile_local_rw()
466 imsic_vs_csr_write(IMSIC_EITHRESHOLD, idata->val); in imsic_vsfile_local_rw()
468 idata->val = imsic_vs_csr_read(IMSIC_EITHRESHOLD); in imsic_vsfile_local_rw()
473 if (idata->isel & 0x1) in imsic_vsfile_local_rw()
476 if (idata->write) in imsic_vsfile_local_rw()
477 imsic_eix_write(idata->isel, idata->val); in imsic_vsfile_local_rw()
479 idata->val = imsic_eix_read(idata->isel); in imsic_vsfile_local_rw()
496 /* We can only access register if we have a IMSIC VS-file */ in imsic_vsfile_rw()
498 return -EINVAL; in imsic_vsfile_rw()
524 /* We can only zero-out if we have a IMSIC VS-file */ in imsic_vsfile_local_clear()
573 eix = &mrif->eix[i]; in imsic_vsfile_local_update()
574 imsic_eix_set(IMSIC_EIP0 + i * 2, eix->eip[0]); in imsic_vsfile_local_update()
575 imsic_eix_set(IMSIC_EIE0 + i * 2, eix->eie[0]); in imsic_vsfile_local_update()
577 imsic_eix_set(IMSIC_EIP0 + i * 2 + 1, eix->eip[1]); in imsic_vsfile_local_update()
578 imsic_eix_set(IMSIC_EIE0 + i * 2 + 1, eix->eie[1]); in imsic_vsfile_local_update()
581 imsic_vs_csr_write(IMSIC_EITHRESHOLD, mrif->eithreshold); in imsic_vsfile_local_update()
582 imsic_vs_csr_write(IMSIC_EIDELIVERY, mrif->eidelivery); in imsic_vsfile_local_update()
595 * SW-file in this function because it is always called when the in imsic_vsfile_cleanup()
599 write_lock_irqsave(&imsic->vsfile_lock, flags); in imsic_vsfile_cleanup()
600 old_vsfile_hgei = imsic->vsfile_hgei; in imsic_vsfile_cleanup()
601 old_vsfile_cpu = imsic->vsfile_cpu; in imsic_vsfile_cleanup()
602 imsic->vsfile_cpu = imsic->vsfile_hgei = -1; in imsic_vsfile_cleanup()
603 imsic->vsfile_va = NULL; in imsic_vsfile_cleanup()
604 imsic->vsfile_pa = 0; in imsic_vsfile_cleanup()
605 write_unlock_irqrestore(&imsic->vsfile_lock, flags); in imsic_vsfile_cleanup()
607 memset(imsic->swfile, 0, sizeof(*imsic->swfile)); in imsic_vsfile_cleanup()
615 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in imsic_swfile_extirq_update()
616 struct imsic_mrif *mrif = imsic->swfile; in imsic_swfile_extirq_update()
625 raw_spin_lock_irqsave(&imsic->swfile_extirq_lock, flags); in imsic_swfile_extirq_update()
627 if (imsic_mrif_atomic_read(mrif, &mrif->eidelivery) && in imsic_swfile_extirq_update()
628 imsic_mrif_topei(mrif, imsic->nr_eix, imsic->nr_msis)) in imsic_swfile_extirq_update()
633 raw_spin_unlock_irqrestore(&imsic->swfile_extirq_lock, flags); in imsic_swfile_extirq_update()
639 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in imsic_swfile_read()
643 * write SW-file and MRIF in this function because it is always in imsic_swfile_read()
644 * called when VCPU is not using SW-file and the MRIF points to in imsic_swfile_read()
648 memcpy(mrif, imsic->swfile, sizeof(*mrif)); in imsic_swfile_read()
650 memset(imsic->swfile, 0, sizeof(*imsic->swfile)); in imsic_swfile_read()
660 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in imsic_swfile_update()
661 struct imsic_mrif *smrif = imsic->swfile; in imsic_swfile_update()
663 imsic_mrif_atomic_write(smrif, &smrif->eidelivery, mrif->eidelivery); in imsic_swfile_update()
664 imsic_mrif_atomic_write(smrif, &smrif->eithreshold, mrif->eithreshold); in imsic_swfile_update()
665 for (i = 0; i < imsic->nr_eix; i++) { in imsic_swfile_update()
666 seix = &smrif->eix[i]; in imsic_swfile_update()
667 eix = &mrif->eix[i]; in imsic_swfile_update()
668 imsic_mrif_atomic_or(smrif, &seix->eip[0], eix->eip[0]); in imsic_swfile_update()
669 imsic_mrif_atomic_or(smrif, &seix->eie[0], eix->eie[0]); in imsic_swfile_update()
671 imsic_mrif_atomic_or(smrif, &seix->eip[1], eix->eip[1]); in imsic_swfile_update()
672 imsic_mrif_atomic_or(smrif, &seix->eie[1], eix->eie[1]); in imsic_swfile_update()
684 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_vcpu_aia_imsic_release()
686 /* Read and clear IMSIC VS-file details */ in kvm_riscv_vcpu_aia_imsic_release()
687 write_lock_irqsave(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_release()
688 old_vsfile_hgei = imsic->vsfile_hgei; in kvm_riscv_vcpu_aia_imsic_release()
689 old_vsfile_cpu = imsic->vsfile_cpu; in kvm_riscv_vcpu_aia_imsic_release()
690 imsic->vsfile_cpu = imsic->vsfile_hgei = -1; in kvm_riscv_vcpu_aia_imsic_release()
691 imsic->vsfile_va = NULL; in kvm_riscv_vcpu_aia_imsic_release()
692 imsic->vsfile_pa = 0; in kvm_riscv_vcpu_aia_imsic_release()
693 write_unlock_irqrestore(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_release()
695 /* Do nothing, if no IMSIC VS-file to release */ in kvm_riscv_vcpu_aia_imsic_release()
701 * the old IMSIC VS-file so we first re-direct all interrupt in kvm_riscv_vcpu_aia_imsic_release()
705 /* Purge the G-stage mapping */ in kvm_riscv_vcpu_aia_imsic_release()
706 kvm_riscv_gstage_iounmap(vcpu->kvm, in kvm_riscv_vcpu_aia_imsic_release()
707 vcpu->arch.aia_context.imsic_addr, in kvm_riscv_vcpu_aia_imsic_release()
713 * At this point, all interrupt producers have been re-directed in kvm_riscv_vcpu_aia_imsic_release()
715 * VS-file to the IMSIC SW-file. in kvm_riscv_vcpu_aia_imsic_release()
718 /* Read and clear register state from old IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_release()
720 imsic_vsfile_read(old_vsfile_hgei, old_vsfile_cpu, imsic->nr_hw_eix, in kvm_riscv_vcpu_aia_imsic_release()
723 /* Update register state in IMSIC SW-file */ in kvm_riscv_vcpu_aia_imsic_release()
726 /* Free-up old IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_release()
736 struct kvm *kvm = vcpu->kvm; in kvm_riscv_vcpu_aia_imsic_update()
737 struct kvm_run *run = vcpu->run; in kvm_riscv_vcpu_aia_imsic_update()
738 struct kvm_vcpu_aia *vaia = &vcpu->arch.aia_context; in kvm_riscv_vcpu_aia_imsic_update()
739 struct imsic *imsic = vaia->imsic_state; in kvm_riscv_vcpu_aia_imsic_update()
740 int ret = 0, new_vsfile_hgei = -1, old_vsfile_hgei, old_vsfile_cpu; in kvm_riscv_vcpu_aia_imsic_update()
743 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_EMUL) in kvm_riscv_vcpu_aia_imsic_update()
746 /* Read old IMSIC VS-file details */ in kvm_riscv_vcpu_aia_imsic_update()
747 read_lock_irqsave(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_update()
748 old_vsfile_hgei = imsic->vsfile_hgei; in kvm_riscv_vcpu_aia_imsic_update()
749 old_vsfile_cpu = imsic->vsfile_cpu; in kvm_riscv_vcpu_aia_imsic_update()
750 read_unlock_irqrestore(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_update()
753 if (old_vsfile_cpu == vcpu->cpu) in kvm_riscv_vcpu_aia_imsic_update()
756 /* Allocate new IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
757 ret = kvm_riscv_aia_alloc_hgei(vcpu->cpu, vcpu, in kvm_riscv_vcpu_aia_imsic_update()
761 if (kvm->arch.aia.mode == KVM_DEV_RISCV_AIA_MODE_HWACCEL) { in kvm_riscv_vcpu_aia_imsic_update()
762 run->fail_entry.hardware_entry_failure_reason = in kvm_riscv_vcpu_aia_imsic_update()
764 run->fail_entry.cpu = vcpu->cpu; in kvm_riscv_vcpu_aia_imsic_update()
765 run->exit_reason = KVM_EXIT_FAIL_ENTRY; in kvm_riscv_vcpu_aia_imsic_update()
769 /* Release old IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
780 * to the old IMSIC VS-file so we first move all interrupt in kvm_riscv_vcpu_aia_imsic_update()
781 * producers to the new IMSIC VS-file. in kvm_riscv_vcpu_aia_imsic_update()
784 /* Zero-out new IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
785 imsic_vsfile_local_clear(new_vsfile_hgei, imsic->nr_hw_eix); in kvm_riscv_vcpu_aia_imsic_update()
787 /* Update G-stage mapping for the new IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
788 ret = kvm_riscv_gstage_ioremap(kvm, vcpu->arch.aia_context.imsic_addr, in kvm_riscv_vcpu_aia_imsic_update()
796 /* Update new IMSIC VS-file details in IMSIC context */ in kvm_riscv_vcpu_aia_imsic_update()
797 write_lock_irqsave(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_update()
798 imsic->vsfile_hgei = new_vsfile_hgei; in kvm_riscv_vcpu_aia_imsic_update()
799 imsic->vsfile_cpu = vcpu->cpu; in kvm_riscv_vcpu_aia_imsic_update()
800 imsic->vsfile_va = new_vsfile_va; in kvm_riscv_vcpu_aia_imsic_update()
801 imsic->vsfile_pa = new_vsfile_pa; in kvm_riscv_vcpu_aia_imsic_update()
802 write_unlock_irqrestore(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_update()
806 * to the new IMSIC VS-file so we move register state from in kvm_riscv_vcpu_aia_imsic_update()
807 * the old IMSIC VS/SW-file to the new IMSIC VS-file. in kvm_riscv_vcpu_aia_imsic_update()
812 /* Read and clear register state from old IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
814 imsic->nr_hw_eix, true, &tmrif); in kvm_riscv_vcpu_aia_imsic_update()
816 /* Free-up old IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
819 /* Read and clear register state from IMSIC SW-file */ in kvm_riscv_vcpu_aia_imsic_update()
823 /* Restore register state in the new IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
824 imsic_vsfile_local_update(new_vsfile_hgei, imsic->nr_hw_eix, &tmrif); in kvm_riscv_vcpu_aia_imsic_update()
827 /* Set VCPU HSTATUS.VGEIN to new IMSIC VS-file */ in kvm_riscv_vcpu_aia_imsic_update()
828 vcpu->arch.guest_context.hstatus &= ~HSTATUS_VGEIN; in kvm_riscv_vcpu_aia_imsic_update()
830 vcpu->arch.guest_context.hstatus |= in kvm_riscv_vcpu_aia_imsic_update()
833 /* Continue run-loop */ in kvm_riscv_vcpu_aia_imsic_update()
837 kvm_riscv_aia_free_hgei(vcpu->cpu, new_vsfile_hgei); in kvm_riscv_vcpu_aia_imsic_update()
848 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_vcpu_aia_imsic_rmw()
852 topei = imsic_mrif_topei(imsic->swfile, imsic->nr_eix, in kvm_riscv_vcpu_aia_imsic_rmw()
853 imsic->nr_msis); in kvm_riscv_vcpu_aia_imsic_rmw()
861 eix = &imsic->swfile->eix[topei / in kvm_riscv_vcpu_aia_imsic_rmw()
863 clear_bit(topei & (BITS_PER_TYPE(u64) - 1), in kvm_riscv_vcpu_aia_imsic_rmw()
864 eix->eip); in kvm_riscv_vcpu_aia_imsic_rmw()
868 r = imsic_mrif_rmw(imsic->swfile, imsic->nr_eix, isel, in kvm_riscv_vcpu_aia_imsic_rmw()
870 /* Forward unknown IMSIC register to user-space */ in kvm_riscv_vcpu_aia_imsic_rmw()
872 rc = (r == -ENOENT) ? 0 : KVM_INSN_ILLEGAL_TRAP; in kvm_riscv_vcpu_aia_imsic_rmw()
891 return -ENODEV; in kvm_riscv_aia_imsic_rw_attr()
896 return -ENODEV; in kvm_riscv_aia_imsic_rw_attr()
899 imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_aia_imsic_rw_attr()
901 read_lock_irqsave(&imsic->vsfile_lock, flags); in kvm_riscv_aia_imsic_rw_attr()
904 vsfile_hgei = imsic->vsfile_hgei; in kvm_riscv_aia_imsic_rw_attr()
905 vsfile_cpu = imsic->vsfile_cpu; in kvm_riscv_aia_imsic_rw_attr()
908 rc = imsic_mrif_rmw(imsic->swfile, imsic->nr_eix, in kvm_riscv_aia_imsic_rw_attr()
909 isel, NULL, *val, -1UL); in kvm_riscv_aia_imsic_rw_attr()
912 rc = imsic_mrif_rmw(imsic->swfile, imsic->nr_eix, in kvm_riscv_aia_imsic_rw_attr()
916 read_unlock_irqrestore(&imsic->vsfile_lock, flags); in kvm_riscv_aia_imsic_rw_attr()
919 rc = imsic_vsfile_rw(vsfile_hgei, vsfile_cpu, imsic->nr_eix, in kvm_riscv_aia_imsic_rw_attr()
932 return -ENODEV; in kvm_riscv_aia_imsic_has_attr()
937 return -ENODEV; in kvm_riscv_aia_imsic_has_attr()
940 imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_aia_imsic_has_attr()
941 return imsic_mrif_isel_check(imsic->nr_eix, isel); in kvm_riscv_aia_imsic_has_attr()
946 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_vcpu_aia_imsic_reset()
953 memset(imsic->swfile, 0, sizeof(*imsic->swfile)); in kvm_riscv_vcpu_aia_imsic_reset()
961 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_vcpu_aia_imsic_inject()
967 return -ENODEV; in kvm_riscv_vcpu_aia_imsic_inject()
970 if (imsic->nr_msis <= iid) in kvm_riscv_vcpu_aia_imsic_inject()
971 return -EINVAL; in kvm_riscv_vcpu_aia_imsic_inject()
973 read_lock_irqsave(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_inject()
975 if (imsic->vsfile_cpu >= 0) { in kvm_riscv_vcpu_aia_imsic_inject()
976 writel(iid, imsic->vsfile_va + IMSIC_MMIO_SETIPNUM_LE); in kvm_riscv_vcpu_aia_imsic_inject()
979 eix = &imsic->swfile->eix[iid / BITS_PER_TYPE(u64)]; in kvm_riscv_vcpu_aia_imsic_inject()
980 set_bit(iid & (BITS_PER_TYPE(u64) - 1), eix->eip); in kvm_riscv_vcpu_aia_imsic_inject()
984 read_unlock_irqrestore(&imsic->vsfile_lock, flags); in kvm_riscv_vcpu_aia_imsic_inject()
993 return -EOPNOTSUPP; in imsic_mmio_read()
1006 return -EOPNOTSUPP; in imsic_mmio_write()
1011 kvm_riscv_aia_inject_msi(vcpu->kvm, &msi); in imsic_mmio_write()
1026 struct kvm *kvm = vcpu->kvm; in kvm_riscv_vcpu_aia_imsic_init()
1029 if (!kvm->arch.aia.nr_ids) in kvm_riscv_vcpu_aia_imsic_init()
1030 return -EINVAL; in kvm_riscv_vcpu_aia_imsic_init()
1035 return -ENOMEM; in kvm_riscv_vcpu_aia_imsic_init()
1036 vcpu->arch.aia_context.imsic_state = imsic; in kvm_riscv_vcpu_aia_imsic_init()
1039 imsic->nr_msis = kvm->arch.aia.nr_ids + 1; in kvm_riscv_vcpu_aia_imsic_init()
1040 rwlock_init(&imsic->vsfile_lock); in kvm_riscv_vcpu_aia_imsic_init()
1041 imsic->nr_eix = BITS_TO_U64(imsic->nr_msis); in kvm_riscv_vcpu_aia_imsic_init()
1042 imsic->nr_hw_eix = BITS_TO_U64(kvm_riscv_aia_max_ids); in kvm_riscv_vcpu_aia_imsic_init()
1043 imsic->vsfile_hgei = imsic->vsfile_cpu = -1; in kvm_riscv_vcpu_aia_imsic_init()
1045 /* Setup IMSIC SW-file */ in kvm_riscv_vcpu_aia_imsic_init()
1047 get_order(sizeof(*imsic->swfile))); in kvm_riscv_vcpu_aia_imsic_init()
1049 ret = -ENOMEM; in kvm_riscv_vcpu_aia_imsic_init()
1052 imsic->swfile = page_to_virt(swfile_page); in kvm_riscv_vcpu_aia_imsic_init()
1053 imsic->swfile_pa = page_to_phys(swfile_page); in kvm_riscv_vcpu_aia_imsic_init()
1054 raw_spin_lock_init(&imsic->swfile_extirq_lock); in kvm_riscv_vcpu_aia_imsic_init()
1057 kvm_iodevice_init(&imsic->iodev, &imsic_iodoev_ops); in kvm_riscv_vcpu_aia_imsic_init()
1058 mutex_lock(&kvm->slots_lock); in kvm_riscv_vcpu_aia_imsic_init()
1060 vcpu->arch.aia_context.imsic_addr, in kvm_riscv_vcpu_aia_imsic_init()
1062 &imsic->iodev); in kvm_riscv_vcpu_aia_imsic_init()
1063 mutex_unlock(&kvm->slots_lock); in kvm_riscv_vcpu_aia_imsic_init()
1070 free_pages((unsigned long)imsic->swfile, in kvm_riscv_vcpu_aia_imsic_init()
1071 get_order(sizeof(*imsic->swfile))); in kvm_riscv_vcpu_aia_imsic_init()
1073 vcpu->arch.aia_context.imsic_state = NULL; in kvm_riscv_vcpu_aia_imsic_init()
1080 struct kvm *kvm = vcpu->kvm; in kvm_riscv_vcpu_aia_imsic_cleanup()
1081 struct imsic *imsic = vcpu->arch.aia_context.imsic_state; in kvm_riscv_vcpu_aia_imsic_cleanup()
1088 mutex_lock(&kvm->slots_lock); in kvm_riscv_vcpu_aia_imsic_cleanup()
1089 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &imsic->iodev); in kvm_riscv_vcpu_aia_imsic_cleanup()
1090 mutex_unlock(&kvm->slots_lock); in kvm_riscv_vcpu_aia_imsic_cleanup()
1092 free_pages((unsigned long)imsic->swfile, in kvm_riscv_vcpu_aia_imsic_cleanup()
1093 get_order(sizeof(*imsic->swfile))); in kvm_riscv_vcpu_aia_imsic_cleanup()
1095 vcpu->arch.aia_context.imsic_state = NULL; in kvm_riscv_vcpu_aia_imsic_cleanup()