Lines Matching +full:off +full:- +full:state
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/irqchip/riscv-aplic.h>
20 u32 state; member
46 if (!irq || aplic->nr_irqs <= irq) in aplic_read_sourcecfg()
48 irqd = &aplic->irqs[irq]; in aplic_read_sourcecfg()
50 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_read_sourcecfg()
51 ret = irqd->sourcecfg; in aplic_read_sourcecfg()
52 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_read_sourcecfg()
62 if (!irq || aplic->nr_irqs <= irq) in aplic_write_sourcecfg()
64 irqd = &aplic->irqs[irq]; in aplic_write_sourcecfg()
71 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_write_sourcecfg()
72 irqd->sourcecfg = val; in aplic_write_sourcecfg()
73 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_write_sourcecfg()
82 if (!irq || aplic->nr_irqs <= irq) in aplic_read_target()
84 irqd = &aplic->irqs[irq]; in aplic_read_target()
86 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_read_target()
87 ret = irqd->target; in aplic_read_target()
88 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_read_target()
98 if (!irq || aplic->nr_irqs <= irq) in aplic_write_target()
100 irqd = &aplic->irqs[irq]; in aplic_write_target()
106 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_write_target()
107 irqd->target = val; in aplic_write_target()
108 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_write_target()
117 if (!irq || aplic->nr_irqs <= irq) in aplic_read_pending()
119 irqd = &aplic->irqs[irq]; in aplic_read_pending()
121 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_read_pending()
122 ret = (irqd->state & APLIC_IRQ_STATE_PENDING) ? true : false; in aplic_read_pending()
123 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_read_pending()
133 if (!irq || aplic->nr_irqs <= irq) in aplic_write_pending()
135 irqd = &aplic->irqs[irq]; in aplic_write_pending()
137 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_write_pending()
139 sm = irqd->sourcecfg & APLIC_SOURCECFG_SM_MASK; in aplic_write_pending()
147 if ((irqd->state & APLIC_IRQ_STATE_INPUT) && in aplic_write_pending()
150 if (!(irqd->state & APLIC_IRQ_STATE_INPUT) && in aplic_write_pending()
156 irqd->state |= APLIC_IRQ_STATE_PENDING; in aplic_write_pending()
158 irqd->state &= ~APLIC_IRQ_STATE_PENDING; in aplic_write_pending()
161 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_write_pending()
170 if (!irq || aplic->nr_irqs <= irq) in aplic_read_enabled()
172 irqd = &aplic->irqs[irq]; in aplic_read_enabled()
174 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_read_enabled()
175 ret = (irqd->state & APLIC_IRQ_STATE_ENABLED) ? true : false; in aplic_read_enabled()
176 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_read_enabled()
186 if (!irq || aplic->nr_irqs <= irq) in aplic_write_enabled()
188 irqd = &aplic->irqs[irq]; in aplic_write_enabled()
190 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_write_enabled()
192 irqd->state |= APLIC_IRQ_STATE_ENABLED; in aplic_write_enabled()
194 irqd->state &= ~APLIC_IRQ_STATE_ENABLED; in aplic_write_enabled()
195 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_write_enabled()
205 if (!irq || aplic->nr_irqs <= irq) in aplic_read_input()
207 irqd = &aplic->irqs[irq]; in aplic_read_input()
209 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_read_input()
211 sourcecfg = irqd->sourcecfg; in aplic_read_input()
219 raw_input = (irqd->state & APLIC_IRQ_STATE_INPUT) ? 1 : 0; in aplic_read_input()
225 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_read_input()
248 struct aplic *aplic = kvm->arch.aia.aplic_state; in aplic_update_irq_range()
250 if (!(aplic->domaincfg & APLIC_DOMAINCFG_IE)) in aplic_update_irq_range()
254 if (!irq || aplic->nr_irqs <= irq) in aplic_update_irq_range()
256 irqd = &aplic->irqs[irq]; in aplic_update_irq_range()
258 raw_spin_lock_irqsave(&irqd->lock, flags); in aplic_update_irq_range()
261 target = irqd->target; in aplic_update_irq_range()
262 if ((irqd->state & APLIC_IRQ_STATE_ENPEND) == in aplic_update_irq_range()
264 irqd->state &= ~APLIC_IRQ_STATE_PENDING; in aplic_update_irq_range()
268 raw_spin_unlock_irqrestore(&irqd->lock, flags); in aplic_update_irq_range()
281 struct aplic *aplic = kvm->arch.aia.aplic_state; in kvm_riscv_aia_aplic_inject()
283 if (!aplic || !source || (aplic->nr_irqs <= source)) in kvm_riscv_aia_aplic_inject()
284 return -ENODEV; in kvm_riscv_aia_aplic_inject()
285 irqd = &aplic->irqs[source]; in kvm_riscv_aia_aplic_inject()
286 ie = (aplic->domaincfg & APLIC_DOMAINCFG_IE) ? true : false; in kvm_riscv_aia_aplic_inject()
288 raw_spin_lock_irqsave(&irqd->lock, flags); in kvm_riscv_aia_aplic_inject()
290 if (irqd->sourcecfg & APLIC_SOURCECFG_D) in kvm_riscv_aia_aplic_inject()
293 switch (irqd->sourcecfg & APLIC_SOURCECFG_SM_MASK) { in kvm_riscv_aia_aplic_inject()
295 if (level && !(irqd->state & APLIC_IRQ_STATE_INPUT) && in kvm_riscv_aia_aplic_inject()
296 !(irqd->state & APLIC_IRQ_STATE_PENDING)) in kvm_riscv_aia_aplic_inject()
297 irqd->state |= APLIC_IRQ_STATE_PENDING; in kvm_riscv_aia_aplic_inject()
300 if (!level && (irqd->state & APLIC_IRQ_STATE_INPUT) && in kvm_riscv_aia_aplic_inject()
301 !(irqd->state & APLIC_IRQ_STATE_PENDING)) in kvm_riscv_aia_aplic_inject()
302 irqd->state |= APLIC_IRQ_STATE_PENDING; in kvm_riscv_aia_aplic_inject()
305 if (level && !(irqd->state & APLIC_IRQ_STATE_PENDING)) in kvm_riscv_aia_aplic_inject()
306 irqd->state |= APLIC_IRQ_STATE_PENDING; in kvm_riscv_aia_aplic_inject()
309 if (!level && !(irqd->state & APLIC_IRQ_STATE_PENDING)) in kvm_riscv_aia_aplic_inject()
310 irqd->state |= APLIC_IRQ_STATE_PENDING; in kvm_riscv_aia_aplic_inject()
315 irqd->state |= APLIC_IRQ_STATE_INPUT; in kvm_riscv_aia_aplic_inject()
317 irqd->state &= ~APLIC_IRQ_STATE_INPUT; in kvm_riscv_aia_aplic_inject()
319 target = irqd->target; in kvm_riscv_aia_aplic_inject()
320 if (ie && ((irqd->state & APLIC_IRQ_STATE_ENPEND) == in kvm_riscv_aia_aplic_inject()
322 irqd->state &= ~APLIC_IRQ_STATE_PENDING; in kvm_riscv_aia_aplic_inject()
327 raw_spin_unlock_irqrestore(&irqd->lock, flags); in kvm_riscv_aia_aplic_inject()
387 static int aplic_mmio_read_offset(struct kvm *kvm, gpa_t off, u32 *val32) in aplic_mmio_read_offset() argument
390 struct aplic *aplic = kvm->arch.aia.aplic_state; in aplic_mmio_read_offset()
392 if ((off & 0x3) != 0) in aplic_mmio_read_offset()
393 return -EOPNOTSUPP; in aplic_mmio_read_offset()
395 if (off == APLIC_DOMAINCFG) { in aplic_mmio_read_offset()
397 aplic->domaincfg | APLIC_DOMAINCFG_DM; in aplic_mmio_read_offset()
398 } else if ((off >= APLIC_SOURCECFG_BASE) && in aplic_mmio_read_offset()
399 (off < (APLIC_SOURCECFG_BASE + (aplic->nr_irqs - 1) * 4))) { in aplic_mmio_read_offset()
400 i = ((off - APLIC_SOURCECFG_BASE) >> 2) + 1; in aplic_mmio_read_offset()
402 } else if ((off >= APLIC_SETIP_BASE) && in aplic_mmio_read_offset()
403 (off < (APLIC_SETIP_BASE + aplic->nr_words * 4))) { in aplic_mmio_read_offset()
404 i = (off - APLIC_SETIP_BASE) >> 2; in aplic_mmio_read_offset()
406 } else if (off == APLIC_SETIPNUM) { in aplic_mmio_read_offset()
408 } else if ((off >= APLIC_CLRIP_BASE) && in aplic_mmio_read_offset()
409 (off < (APLIC_CLRIP_BASE + aplic->nr_words * 4))) { in aplic_mmio_read_offset()
410 i = (off - APLIC_CLRIP_BASE) >> 2; in aplic_mmio_read_offset()
412 } else if (off == APLIC_CLRIPNUM) { in aplic_mmio_read_offset()
414 } else if ((off >= APLIC_SETIE_BASE) && in aplic_mmio_read_offset()
415 (off < (APLIC_SETIE_BASE + aplic->nr_words * 4))) { in aplic_mmio_read_offset()
416 i = (off - APLIC_SETIE_BASE) >> 2; in aplic_mmio_read_offset()
418 } else if (off == APLIC_SETIENUM) { in aplic_mmio_read_offset()
420 } else if ((off >= APLIC_CLRIE_BASE) && in aplic_mmio_read_offset()
421 (off < (APLIC_CLRIE_BASE + aplic->nr_words * 4))) { in aplic_mmio_read_offset()
423 } else if (off == APLIC_CLRIENUM) { in aplic_mmio_read_offset()
425 } else if (off == APLIC_SETIPNUM_LE) { in aplic_mmio_read_offset()
427 } else if (off == APLIC_SETIPNUM_BE) { in aplic_mmio_read_offset()
429 } else if (off == APLIC_GENMSI) { in aplic_mmio_read_offset()
430 *val32 = aplic->genmsi; in aplic_mmio_read_offset()
431 } else if ((off >= APLIC_TARGET_BASE) && in aplic_mmio_read_offset()
432 (off < (APLIC_TARGET_BASE + (aplic->nr_irqs - 1) * 4))) { in aplic_mmio_read_offset()
433 i = ((off - APLIC_TARGET_BASE) >> 2) + 1; in aplic_mmio_read_offset()
436 return -ENODEV; in aplic_mmio_read_offset()
445 return -EOPNOTSUPP; in aplic_mmio_read()
447 return aplic_mmio_read_offset(vcpu->kvm, in aplic_mmio_read()
448 addr - vcpu->kvm->arch.aia.aplic_addr, in aplic_mmio_read()
452 static int aplic_mmio_write_offset(struct kvm *kvm, gpa_t off, u32 val32) in aplic_mmio_write_offset() argument
455 struct aplic *aplic = kvm->arch.aia.aplic_state; in aplic_mmio_write_offset()
457 if ((off & 0x3) != 0) in aplic_mmio_write_offset()
458 return -EOPNOTSUPP; in aplic_mmio_write_offset()
460 if (off == APLIC_DOMAINCFG) { in aplic_mmio_write_offset()
462 aplic->domaincfg = val32 & APLIC_DOMAINCFG_IE; in aplic_mmio_write_offset()
463 } else if ((off >= APLIC_SOURCECFG_BASE) && in aplic_mmio_write_offset()
464 (off < (APLIC_SOURCECFG_BASE + (aplic->nr_irqs - 1) * 4))) { in aplic_mmio_write_offset()
465 i = ((off - APLIC_SOURCECFG_BASE) >> 2) + 1; in aplic_mmio_write_offset()
467 } else if ((off >= APLIC_SETIP_BASE) && in aplic_mmio_write_offset()
468 (off < (APLIC_SETIP_BASE + aplic->nr_words * 4))) { in aplic_mmio_write_offset()
469 i = (off - APLIC_SETIP_BASE) >> 2; in aplic_mmio_write_offset()
471 } else if (off == APLIC_SETIPNUM) { in aplic_mmio_write_offset()
473 } else if ((off >= APLIC_CLRIP_BASE) && in aplic_mmio_write_offset()
474 (off < (APLIC_CLRIP_BASE + aplic->nr_words * 4))) { in aplic_mmio_write_offset()
475 i = (off - APLIC_CLRIP_BASE) >> 2; in aplic_mmio_write_offset()
477 } else if (off == APLIC_CLRIPNUM) { in aplic_mmio_write_offset()
479 } else if ((off >= APLIC_SETIE_BASE) && in aplic_mmio_write_offset()
480 (off < (APLIC_SETIE_BASE + aplic->nr_words * 4))) { in aplic_mmio_write_offset()
481 i = (off - APLIC_SETIE_BASE) >> 2; in aplic_mmio_write_offset()
483 } else if (off == APLIC_SETIENUM) { in aplic_mmio_write_offset()
485 } else if ((off >= APLIC_CLRIE_BASE) && in aplic_mmio_write_offset()
486 (off < (APLIC_CLRIE_BASE + aplic->nr_words * 4))) { in aplic_mmio_write_offset()
487 i = (off - APLIC_CLRIE_BASE) >> 2; in aplic_mmio_write_offset()
489 } else if (off == APLIC_CLRIENUM) { in aplic_mmio_write_offset()
491 } else if (off == APLIC_SETIPNUM_LE) { in aplic_mmio_write_offset()
493 } else if (off == APLIC_SETIPNUM_BE) { in aplic_mmio_write_offset()
495 } else if (off == APLIC_GENMSI) { in aplic_mmio_write_offset()
496 aplic->genmsi = val32 & ~(APLIC_TARGET_GUEST_IDX_MASK << in aplic_mmio_write_offset()
501 } else if ((off >= APLIC_TARGET_BASE) && in aplic_mmio_write_offset()
502 (off < (APLIC_TARGET_BASE + (aplic->nr_irqs - 1) * 4))) { in aplic_mmio_write_offset()
503 i = ((off - APLIC_TARGET_BASE) >> 2) + 1; in aplic_mmio_write_offset()
506 return -ENODEV; in aplic_mmio_write_offset()
508 aplic_update_irq_range(kvm, 1, aplic->nr_irqs - 1); in aplic_mmio_write_offset()
517 return -EOPNOTSUPP; in aplic_mmio_write()
519 return aplic_mmio_write_offset(vcpu->kvm, in aplic_mmio_write()
520 addr - vcpu->kvm->arch.aia.aplic_addr, in aplic_mmio_write()
533 if (!kvm->arch.aia.aplic_state) in kvm_riscv_aia_aplic_set_attr()
534 return -ENODEV; in kvm_riscv_aia_aplic_set_attr()
547 if (!kvm->arch.aia.aplic_state) in kvm_riscv_aia_aplic_get_attr()
548 return -ENODEV; in kvm_riscv_aia_aplic_get_attr()
562 if (!kvm->arch.aia.aplic_state) in kvm_riscv_aia_aplic_has_attr()
563 return -ENODEV; in kvm_riscv_aia_aplic_has_attr()
578 if (!kvm->arch.aia.nr_sources) in kvm_riscv_aia_aplic_init()
581 /* Allocate APLIC global state */ in kvm_riscv_aia_aplic_init()
584 return -ENOMEM; in kvm_riscv_aia_aplic_init()
585 kvm->arch.aia.aplic_state = aplic; in kvm_riscv_aia_aplic_init()
588 aplic->nr_irqs = kvm->arch.aia.nr_sources + 1; in kvm_riscv_aia_aplic_init()
589 aplic->nr_words = DIV_ROUND_UP(aplic->nr_irqs, 32); in kvm_riscv_aia_aplic_init()
590 aplic->irqs = kcalloc(aplic->nr_irqs, in kvm_riscv_aia_aplic_init()
591 sizeof(*aplic->irqs), GFP_KERNEL); in kvm_riscv_aia_aplic_init()
592 if (!aplic->irqs) { in kvm_riscv_aia_aplic_init()
593 ret = -ENOMEM; in kvm_riscv_aia_aplic_init()
596 for (i = 0; i < aplic->nr_irqs; i++) in kvm_riscv_aia_aplic_init()
597 raw_spin_lock_init(&aplic->irqs[i].lock); in kvm_riscv_aia_aplic_init()
600 kvm_iodevice_init(&aplic->iodev, &aplic_iodoev_ops); in kvm_riscv_aia_aplic_init()
601 mutex_lock(&kvm->slots_lock); in kvm_riscv_aia_aplic_init()
603 kvm->arch.aia.aplic_addr, in kvm_riscv_aia_aplic_init()
605 &aplic->iodev); in kvm_riscv_aia_aplic_init()
606 mutex_unlock(&kvm->slots_lock); in kvm_riscv_aia_aplic_init()
611 ret = kvm_riscv_setup_default_irq_routing(kvm, aplic->nr_irqs); in kvm_riscv_aia_aplic_init()
618 mutex_lock(&kvm->slots_lock); in kvm_riscv_aia_aplic_init()
619 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &aplic->iodev); in kvm_riscv_aia_aplic_init()
620 mutex_unlock(&kvm->slots_lock); in kvm_riscv_aia_aplic_init()
622 kfree(aplic->irqs); in kvm_riscv_aia_aplic_init()
624 kvm->arch.aia.aplic_state = NULL; in kvm_riscv_aia_aplic_init()
631 struct aplic *aplic = kvm->arch.aia.aplic_state; in kvm_riscv_aia_aplic_cleanup()
636 mutex_lock(&kvm->slots_lock); in kvm_riscv_aia_aplic_cleanup()
637 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &aplic->iodev); in kvm_riscv_aia_aplic_cleanup()
638 mutex_unlock(&kvm->slots_lock); in kvm_riscv_aia_aplic_cleanup()
640 kfree(aplic->irqs); in kvm_riscv_aia_aplic_cleanup()
642 kvm->arch.aia.aplic_state = NULL; in kvm_riscv_aia_aplic_cleanup()