Lines Matching refs:OP_MASK
2300 #define OP_MASK OP (0x3f) macro
2306 #define OPTO_MASK (OP_MASK | TO_MASK)
2425 #define DRA_MASK (OP_MASK | RA_MASK)
2495 #define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1)
3053 {"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},
3085 {"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},
3086 {"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},
3825 {"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
3826 {"muli", OP(7), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},
3828 {"subfic", OP(8), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
3829 {"sfi", OP(8), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},
3831 {"dozi", OP(9), OP_MASK, M601, PPCVLE, {RT, RA, SI}},
3835 {"cmpli", OP(10), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, UISIGNOPT}},
3836 {"cmpli", OP(10), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, UISIGNOPT}},
3840 {"cmpi", OP(11), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, SI}},
3841 {"cmpi", OP(11), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, SI}},
3843 {"addic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
3844 {"ai", OP(12), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},
3845 {"subic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}},
3847 {"addic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
3848 {"ai.", OP(13), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},
3849 {"subic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}},
3853 {"addi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SI}},
3854 {"cal", OP(14), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},
3855 {"subi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSI}},
3856 {"la", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}},
3860 {"addis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SISIGNOPT}},
3861 {"cau", OP(15), OP_MASK, PWRCOM, PPCVLE, {RT, RA0, SISIGNOPT}},
3862 {"subis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSISIGNOPT}},
4613 {"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
4614 {"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
4616 {"oris", OP(25), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
4617 {"oriu", OP(25), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
4620 {"xori", OP(26), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
4621 {"xoril", OP(26), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
4623 {"xoris", OP(27), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
4624 {"xoriu", OP(27), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
4626 {"andi.", OP(28), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
4627 {"andil.", OP(28), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
4629 {"andis.", OP(29), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
4630 {"andiu.", OP(29), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
6284 {"lwz", OP(32), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}},
6285 {"l", OP(32), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},
6287 {"lwzu", OP(33), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAL}},
6288 {"lu", OP(33), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},
6290 {"lbz", OP(34), OP_MASK, COM, PPCVLE, {RT, D, RA0}},
6292 {"lbzu", OP(35), OP_MASK, COM, PPCVLE, {RT, D, RAL}},
6294 {"stw", OP(36), OP_MASK, PPCCOM, PPCVLE, {RS, D, RA0}},
6295 {"st", OP(36), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}},
6297 {"stwu", OP(37), OP_MASK, PPCCOM, PPCVLE, {RS, D, RAS}},
6298 {"stu", OP(37), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}},
6300 {"stb", OP(38), OP_MASK, COM, PPCVLE, {RS, D, RA0}},
6302 {"stbu", OP(39), OP_MASK, COM, PPCVLE, {RS, D, RAS}},
6304 {"lhz", OP(40), OP_MASK, COM, PPCVLE, {RT, D, RA0}},
6306 {"lhzu", OP(41), OP_MASK, COM, PPCVLE, {RT, D, RAL}},
6308 {"lha", OP(42), OP_MASK, COM, PPCVLE, {RT, D, RA0}},
6310 {"lhau", OP(43), OP_MASK, COM, PPCVLE, {RT, D, RAL}},
6312 {"sth", OP(44), OP_MASK, COM, PPCVLE, {RS, D, RA0}},
6314 {"sthu", OP(45), OP_MASK, COM, PPCVLE, {RS, D, RAS}},
6316 {"lmw", OP(46), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAM}},
6317 {"lm", OP(46), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},
6319 {"stmw", OP(47), OP_MASK, PPCCOM, PPCVLE, {RS, D, RA0}},
6320 {"stm", OP(47), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}},
6322 {"lfs", OP(48), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RA0}},
6324 {"lfsu", OP(49), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RAS}},
6326 {"lfd", OP(50), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RA0}},
6328 {"lfdu", OP(51), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RAS}},
6330 {"stfs", OP(52), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RA0}},
6332 {"stfsu", OP(53), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}},
6334 {"stfd", OP(54), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RA0}},
6336 {"stfdu", OP(55), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}},
6338 {"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}},
6339 {"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}},
6340 {"lfq", OP(56), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}},
6344 {"lfdp", OP(57), OP_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}},
6345 {"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}},
6346 {"lfqu", OP(57), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}},
6662 {"psq_st", OP(60), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}},
6663 {"stfq", OP(60), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}},
6669 {"stfdp", OP(61), OP_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}},
6670 {"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}},
6671 {"stfqu", OP(61), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}},
7052 {"e_add16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, SI}},
7053 {"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7054 {"e_sub16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, NSI}},
7064 {"e_lbz", OP(12), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7065 {"e_stb", OP(13), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7066 {"e_lha", OP(14), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7078 {"e_lwz", OP(20), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7079 {"e_stw", OP(21), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7080 {"e_lhz", OP(22), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
7081 {"e_sth", OP(23), OP_MASK, PPCVLE, 0, {RT, D, RA0}},