Lines Matching full:mpic
2 * arch/powerpc/kernel/mpic.c
5 * common implementation being IBM's MPIC. This driver also can deal
41 #include <asm/mpic.h>
44 #include "mpic.h"
53 .name = "mpic",
54 .dev_name = "mpic",
58 static struct mpic *mpics;
59 static struct mpic *mpic_primary;
72 [0] = { /* Original OpenPIC compatible MPIC */
152 #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name]
160 static inline unsigned int mpic_processor_id(struct mpic *mpic) in mpic_processor_id() argument
164 if (!(mpic->flags & MPIC_SECONDARY)) in mpic_processor_id()
212 static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) in _mpic_ipi_read() argument
214 enum mpic_reg_type type = mpic->reg_type; in _mpic_ipi_read()
218 if ((mpic->flags & MPIC_BROKEN_IPI) && type == mpic_access_mmio_le) in _mpic_ipi_read()
220 return _mpic_read(type, &mpic->gregs, offset); in _mpic_ipi_read()
223 static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 value) in _mpic_ipi_write() argument
228 _mpic_write(mpic->reg_type, &mpic->gregs, offset, value); in _mpic_ipi_write()
231 static inline unsigned int mpic_tm_offset(struct mpic *mpic, unsigned int tm) in mpic_tm_offset() argument
237 static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm) in _mpic_tm_read() argument
239 unsigned int offset = mpic_tm_offset(mpic, tm) + in _mpic_tm_read()
242 return _mpic_read(mpic->reg_type, &mpic->tmregs, offset); in _mpic_tm_read()
245 static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32 value) in _mpic_tm_write() argument
247 unsigned int offset = mpic_tm_offset(mpic, tm) + in _mpic_tm_write()
250 _mpic_write(mpic->reg_type, &mpic->tmregs, offset, value); in _mpic_tm_write()
253 static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg) in _mpic_cpu_read() argument
255 unsigned int cpu = mpic_processor_id(mpic); in _mpic_cpu_read()
257 return _mpic_read(mpic->reg_type, &mpic->cpuregs[cpu], reg); in _mpic_cpu_read()
260 static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value) in _mpic_cpu_write() argument
262 unsigned int cpu = mpic_processor_id(mpic); in _mpic_cpu_write()
264 _mpic_write(mpic->reg_type, &mpic->cpuregs[cpu], reg, value); in _mpic_cpu_write()
267 static inline u32 _mpic_irq_read(struct mpic *mpic, unsigned int src_no, unsigned int reg) in _mpic_irq_read() argument
269 unsigned int isu = src_no >> mpic->isu_shift; in _mpic_irq_read()
270 unsigned int idx = src_no & mpic->isu_mask; in _mpic_irq_read()
273 val = _mpic_read(mpic->reg_type, &mpic->isus[isu], in _mpic_irq_read()
278 mpic->isu_reg0_shadow[src_no]; in _mpic_irq_read()
283 static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no, in _mpic_irq_write() argument
286 unsigned int isu = src_no >> mpic->isu_shift; in _mpic_irq_write()
287 unsigned int idx = src_no & mpic->isu_mask; in _mpic_irq_write()
289 _mpic_write(mpic->reg_type, &mpic->isus[isu], in _mpic_irq_write()
294 mpic->isu_reg0_shadow[src_no] = in _mpic_irq_write()
299 #define mpic_read(b,r) _mpic_read(mpic->reg_type,&(b),(r))
300 #define mpic_write(b,r,v) _mpic_write(mpic->reg_type,&(b),(r),(v))
301 #define mpic_ipi_read(i) _mpic_ipi_read(mpic,(i))
302 #define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v))
303 #define mpic_tm_read(i) _mpic_tm_read(mpic,(i))
304 #define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v))
305 #define mpic_cpu_read(i) _mpic_cpu_read(mpic,(i))
306 #define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v))
307 #define mpic_irq_read(s,r) _mpic_irq_read(mpic,(s),(r))
308 #define mpic_irq_write(s,r,v) _mpic_irq_write(mpic,(s),(r),(v))
316 static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr, in _mpic_map_mmio() argument
325 static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb, in _mpic_map_dcr() argument
328 phys_addr_t phys_addr = dcr_resource_start(mpic->node, 0); in _mpic_map_dcr()
329 rb->dhost = dcr_map(mpic->node, phys_addr + offset, size); in _mpic_map_dcr()
333 static inline void mpic_map(struct mpic *mpic, in mpic_map() argument
337 if (mpic->flags & MPIC_USES_DCR) in mpic_map()
338 _mpic_map_dcr(mpic, rb, offset, size); in mpic_map()
340 _mpic_map_mmio(mpic, phys_addr, rb, offset, size); in mpic_map()
351 static void __init mpic_test_broken_ipi(struct mpic *mpic) in mpic_test_broken_ipi() argument
355 mpic_write(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0), MPIC_VECPRI_MASK); in mpic_test_broken_ipi()
356 r = mpic_read(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0)); in mpic_test_broken_ipi()
359 printk(KERN_INFO "mpic: Detected reversed IPI registers\n"); in mpic_test_broken_ipi()
360 mpic->flags |= MPIC_BROKEN_IPI; in mpic_test_broken_ipi()
367 * to force the edge setting on the MPIC and do the ack workaround.
369 static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source) in mpic_is_ht_interrupt() argument
371 if (source >= 128 || !mpic->fixups) in mpic_is_ht_interrupt()
373 return mpic->fixups[source].base != NULL; in mpic_is_ht_interrupt()
377 static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source) in mpic_ht_end_irq() argument
379 struct mpic_irq_fixup *fixup = &mpic->fixups[source]; in mpic_ht_end_irq()
386 raw_spin_lock(&mpic->fixup_lock); in mpic_ht_end_irq()
389 raw_spin_unlock(&mpic->fixup_lock); in mpic_ht_end_irq()
393 static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, in mpic_startup_ht_interrupt() argument
396 struct mpic_irq_fixup *fixup = &mpic->fixups[source]; in mpic_startup_ht_interrupt()
405 raw_spin_lock_irqsave(&mpic->fixup_lock, flags); in mpic_startup_ht_interrupt()
413 raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); in mpic_startup_ht_interrupt()
418 mpic->save_data[source].fixup_data = tmp | 1; in mpic_startup_ht_interrupt()
422 static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source) in mpic_shutdown_ht_interrupt() argument
424 struct mpic_irq_fixup *fixup = &mpic->fixups[source]; in mpic_shutdown_ht_interrupt()
434 raw_spin_lock_irqsave(&mpic->fixup_lock, flags); in mpic_shutdown_ht_interrupt()
439 raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); in mpic_shutdown_ht_interrupt()
444 mpic->save_data[source].fixup_data = tmp & ~1; in mpic_shutdown_ht_interrupt()
449 static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase, in mpic_scan_ht_msi() argument
477 printk(KERN_DEBUG "mpic: - HT:%02x.%x %s MSI mapping found @ 0x%llx\n", in mpic_scan_ht_msi()
485 static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase, in mpic_scan_ht_msi() argument
492 static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase, in mpic_scan_ht_pic() argument
516 printk(KERN_INFO "mpic: - HT:%02x.%x [0x%02x] vendor %04x device %04x" in mpic_scan_ht_pic()
528 mpic->fixups[irq].index = i; in mpic_scan_ht_pic()
529 mpic->fixups[irq].base = base; in mpic_scan_ht_pic()
532 mpic->fixups[irq].applebase = devbase + 0x60; in mpic_scan_ht_pic()
534 mpic->fixups[irq].applebase = NULL; in mpic_scan_ht_pic()
536 mpic->fixups[irq].data = readl(base + 4) | 0x80000000; in mpic_scan_ht_pic()
541 static void __init mpic_scan_ht_pics(struct mpic *mpic) in mpic_scan_ht_pics() argument
546 printk(KERN_INFO "mpic: Setting up HT PICs workarounds for U3/U4\n"); in mpic_scan_ht_pics()
549 mpic->fixups = kcalloc(128, sizeof(*mpic->fixups), GFP_KERNEL); in mpic_scan_ht_pics()
550 BUG_ON(mpic->fixups == NULL); in mpic_scan_ht_pics()
553 raw_spin_lock_init(&mpic->fixup_lock); in mpic_scan_ht_pics()
581 mpic_scan_ht_pic(mpic, devbase, devfn, l); in mpic_scan_ht_pics()
582 mpic_scan_ht_msi(mpic, devbase, devfn); in mpic_scan_ht_pics()
593 static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source) in mpic_is_ht_interrupt() argument
598 static void __init mpic_scan_ht_pics(struct mpic *mpic) in mpic_scan_ht_pics() argument
604 /* Find an mpic associated with a given linux interrupt */
605 static struct mpic *mpic_find(unsigned int irq) in mpic_find()
614 static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int src) in mpic_is_ipi() argument
616 return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); in mpic_is_ipi()
620 static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int src) in mpic_is_tm() argument
622 return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]); in mpic_is_tm()
637 /* Get the mpic structure from the IPI number */
638 static inline struct mpic * mpic_from_ipi(struct irq_data *d) in mpic_from_ipi()
644 /* Get the mpic structure from the irq number */
645 static inline struct mpic * mpic_from_irq(unsigned int irq) in mpic_from_irq()
650 /* Get the mpic structure from the irq data */
651 static inline struct mpic * mpic_from_irq_data(struct irq_data *d) in mpic_from_irq_data()
657 static inline void mpic_eoi(struct mpic *mpic) in mpic_eoi() argument
670 struct mpic *mpic = mpic_from_irq_data(d); in mpic_unmask_irq() local
673 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src); in mpic_unmask_irq()
691 struct mpic *mpic = mpic_from_irq_data(d); in mpic_mask_irq() local
694 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src); in mpic_mask_irq()
712 struct mpic *mpic = mpic_from_irq_data(d); in mpic_end_irq() local
715 DBG("%s: end_irq: %d\n", mpic->name, d->irq); in mpic_end_irq()
718 * should only lower the priority, the MPIC should have properly in mpic_end_irq()
722 mpic_eoi(mpic); in mpic_end_irq()
729 struct mpic *mpic = mpic_from_irq_data(d); in mpic_unmask_ht_irq() local
735 mpic_ht_end_irq(mpic, src); in mpic_unmask_ht_irq()
740 struct mpic *mpic = mpic_from_irq_data(d); in mpic_startup_ht_irq() local
744 mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); in mpic_startup_ht_irq()
751 struct mpic *mpic = mpic_from_irq_data(d); in mpic_shutdown_ht_irq() local
754 mpic_shutdown_ht_interrupt(mpic, src); in mpic_shutdown_ht_irq()
760 struct mpic *mpic = mpic_from_irq_data(d); in mpic_end_ht_irq() local
764 DBG("%s: end_irq: %d\n", mpic->name, d->irq); in mpic_end_ht_irq()
767 * should only lower the priority, the MPIC should have properly in mpic_end_ht_irq()
772 mpic_ht_end_irq(mpic, src); in mpic_end_ht_irq()
773 mpic_eoi(mpic); in mpic_end_ht_irq()
781 struct mpic *mpic = mpic_from_ipi(d); in mpic_unmask_ipi() local
782 unsigned int src = virq_to_hw(d->irq) - mpic->ipi_vecs[0]; in mpic_unmask_ipi()
784 DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src); in mpic_unmask_ipi()
795 struct mpic *mpic = mpic_from_ipi(d); in mpic_end_ipi() local
802 mpic_eoi(mpic); in mpic_end_ipi()
809 struct mpic *mpic = mpic_from_irq_data(d); in mpic_unmask_tm() local
810 unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0]; in mpic_unmask_tm()
812 DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, d->irq, src); in mpic_unmask_tm()
819 struct mpic *mpic = mpic_from_irq_data(d); in mpic_mask_tm() local
820 unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0]; in mpic_mask_tm()
829 struct mpic *mpic = mpic_from_irq_data(d); in mpic_set_affinity() local
832 if (mpic->flags & MPIC_SINGLE_DEST_CPU) { in mpic_set_affinity()
848 static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) in mpic_type_to_vecpri() argument
871 struct mpic *mpic = mpic_from_irq_data(d); in mpic_set_irq_type() local
875 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", in mpic_set_irq_type()
876 mpic, d->irq, src, flow_type); in mpic_set_irq_type()
878 if (src >= mpic->num_sources) in mpic_set_irq_type()
907 WARN_ONCE(1, "mpic: unknown IRQ type %d\n", vold); in mpic_set_irq_type()
914 if (mpic_is_ht_interrupt(mpic, src)) in mpic_set_irq_type()
918 vecpri = mpic_type_to_vecpri(mpic, flow_type); in mpic_set_irq_type()
931 struct mpic *mpic = mpic_from_irq(virq); in mpic_set_vector() local
935 DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n", in mpic_set_vector()
936 mpic, virq, src, vector); in mpic_set_vector()
938 if (src >= mpic->num_sources) in mpic_set_vector()
949 struct mpic *mpic = mpic_from_irq(virq); in mpic_set_destination() local
952 DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n", in mpic_set_destination()
953 mpic, virq, src, cpuid); in mpic_set_destination()
955 if (src >= mpic->num_sources) in mpic_set_destination()
997 /* Exact match, unless mpic node is NULL */ in mpic_host_match()
1005 struct mpic *mpic = h->host_data; in mpic_host_map() local
1008 DBG("mpic: map virq %d, hwirq 0x%lx\n", virq, hw); in mpic_host_map()
1010 if (hw == mpic->spurious_vec) in mpic_host_map()
1012 if (mpic->protected && test_bit(hw, mpic->protected)) { in mpic_host_map()
1013 pr_warn("mpic: Mapping of source 0x%x failed, source protected by firmware !\n", in mpic_host_map()
1019 else if (hw >= mpic->ipi_vecs[0]) { in mpic_host_map()
1020 WARN_ON(mpic->flags & MPIC_SECONDARY); in mpic_host_map()
1022 DBG("mpic: mapping as IPI\n"); in mpic_host_map()
1023 irq_set_chip_data(virq, mpic); in mpic_host_map()
1024 irq_set_chip_and_handler(virq, &mpic->hc_ipi, in mpic_host_map()
1030 if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) { in mpic_host_map()
1031 WARN_ON(mpic->flags & MPIC_SECONDARY); in mpic_host_map()
1033 DBG("mpic: mapping as timer\n"); in mpic_host_map()
1034 irq_set_chip_data(virq, mpic); in mpic_host_map()
1035 irq_set_chip_and_handler(virq, &mpic->hc_tm, in mpic_host_map()
1040 if (mpic_map_error_int(mpic, virq, hw)) in mpic_host_map()
1043 if (hw >= mpic->num_sources) { in mpic_host_map()
1044 pr_warn("mpic: Mapping of source 0x%x failed, source out of range !\n", in mpic_host_map()
1049 mpic_msi_reserve_hwirq(mpic, hw); in mpic_host_map()
1052 chip = &mpic->hc_irq; in mpic_host_map()
1056 if (mpic_is_ht_interrupt(mpic, hw)) in mpic_host_map()
1057 chip = &mpic->hc_ht_irq; in mpic_host_map()
1060 DBG("mpic: mapping to irq chip @%p\n", chip); in mpic_host_map()
1062 irq_set_chip_data(virq, mpic); in mpic_host_map()
1068 /* If the MPIC was reset, then all vectors have already been in mpic_host_map()
1072 if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) { in mpic_host_map()
1076 cpu = mpic_processor_id(mpic); in mpic_host_map()
1092 struct mpic *mpic = h->host_data; in mpic_host_xlate() local
1101 if (intsize >= 4 && (mpic->flags & MPIC_FSL)) { in mpic_host_xlate()
1103 * Freescale MPIC with extended intspec: in mpic_host_xlate()
1107 * See Documentation/devicetree/bindings/powerpc/fsl/mpic.txt in mpic_host_xlate()
1113 if (!(mpic->flags & MPIC_FSL_HAS_EIMR)) in mpic_host_xlate()
1116 if (intspec[3] >= ARRAY_SIZE(mpic->err_int_vecs)) in mpic_host_xlate()
1119 *out_hwirq = mpic->err_int_vecs[intspec[3]]; in mpic_host_xlate()
1123 if (intspec[0] >= ARRAY_SIZE(mpic->ipi_vecs)) in mpic_host_xlate()
1126 *out_hwirq = mpic->ipi_vecs[intspec[0]]; in mpic_host_xlate()
1129 if (intspec[0] >= ARRAY_SIZE(mpic->timer_vecs)) in mpic_host_xlate()
1132 *out_hwirq = mpic->timer_vecs[intspec[0]]; in mpic_host_xlate()
1160 DBG("mpic: xlate (%d cells: 0x%08x 0x%08x) to line 0x%lx sense 0x%x\n", in mpic_host_xlate()
1166 /* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
1170 struct mpic *mpic = irq_desc_get_handler_data(desc); in mpic_cascade() local
1173 BUG_ON(!(mpic->flags & MPIC_SECONDARY)); in mpic_cascade()
1175 virq = mpic_get_one_irq(mpic); in mpic_cascade()
1188 static u32 fsl_mpic_get_version(struct mpic *mpic) in fsl_mpic_get_version() argument
1192 if (!(mpic->flags & MPIC_FSL)) in fsl_mpic_get_version()
1195 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs, in fsl_mpic_get_version()
1207 struct mpic *mpic = mpic_primary; in fsl_mpic_primary_get_version() local
1209 if (mpic) in fsl_mpic_primary_get_version()
1210 return fsl_mpic_get_version(mpic); in fsl_mpic_primary_get_version()
1215 struct mpic * __init mpic_alloc(struct device_node *node, in mpic_alloc()
1223 struct mpic *mpic; in mpic_alloc() local
1230 /* Default MPIC search parameters */ in mpic_alloc()
1269 if (of_device_is_compatible(node, "fsl,mpic")) { in mpic_alloc()
1275 mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL); in mpic_alloc()
1276 if (mpic == NULL) in mpic_alloc()
1279 mpic->name = name; in mpic_alloc()
1280 mpic->node = node; in mpic_alloc()
1281 mpic->paddr = phys_addr; in mpic_alloc()
1282 mpic->flags = flags; in mpic_alloc()
1284 mpic->hc_irq = mpic_irq_chip; in mpic_alloc()
1285 mpic->hc_irq.name = name; in mpic_alloc()
1286 if (!(mpic->flags & MPIC_SECONDARY)) in mpic_alloc()
1287 mpic->hc_irq.irq_set_affinity = mpic_set_affinity; in mpic_alloc()
1289 mpic->hc_ht_irq = mpic_irq_ht_chip; in mpic_alloc()
1290 mpic->hc_ht_irq.name = name; in mpic_alloc()
1291 if (!(mpic->flags & MPIC_SECONDARY)) in mpic_alloc()
1292 mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity; in mpic_alloc()
1296 mpic->hc_ipi = mpic_ipi_chip; in mpic_alloc()
1297 mpic->hc_ipi.name = name; in mpic_alloc()
1300 mpic->hc_tm = mpic_tm_chip; in mpic_alloc()
1301 mpic->hc_tm.name = name; in mpic_alloc()
1303 mpic->num_sources = 0; /* so far */ in mpic_alloc()
1305 if (mpic->flags & MPIC_LARGE_VECTORS) in mpic_alloc()
1310 mpic->timer_vecs[0] = intvec_top - 12; in mpic_alloc()
1311 mpic->timer_vecs[1] = intvec_top - 11; in mpic_alloc()
1312 mpic->timer_vecs[2] = intvec_top - 10; in mpic_alloc()
1313 mpic->timer_vecs[3] = intvec_top - 9; in mpic_alloc()
1314 mpic->timer_vecs[4] = intvec_top - 8; in mpic_alloc()
1315 mpic->timer_vecs[5] = intvec_top - 7; in mpic_alloc()
1316 mpic->timer_vecs[6] = intvec_top - 6; in mpic_alloc()
1317 mpic->timer_vecs[7] = intvec_top - 5; in mpic_alloc()
1318 mpic->ipi_vecs[0] = intvec_top - 4; in mpic_alloc()
1319 mpic->ipi_vecs[1] = intvec_top - 3; in mpic_alloc()
1320 mpic->ipi_vecs[2] = intvec_top - 2; in mpic_alloc()
1321 mpic->ipi_vecs[3] = intvec_top - 1; in mpic_alloc()
1322 mpic->spurious_vec = intvec_top; in mpic_alloc()
1325 psrc = of_get_property(mpic->node, "protected-sources", &psize); in mpic_alloc()
1328 mpic->protected = bitmap_zalloc(intvec_top + 1, GFP_KERNEL); in mpic_alloc()
1329 BUG_ON(mpic->protected == NULL); in mpic_alloc()
1333 __set_bit(psrc[i], mpic->protected); in mpic_alloc()
1338 mpic->hw_set = mpic_infos[MPIC_GET_REGSET(mpic->flags)]; in mpic_alloc()
1342 if (mpic->flags & MPIC_BIG_ENDIAN) in mpic_alloc()
1343 mpic->reg_type = mpic_access_mmio_be; in mpic_alloc()
1345 mpic->reg_type = mpic_access_mmio_le; in mpic_alloc()
1348 * An MPIC with a "dcr-reg" property must be accessed that way, but in mpic_alloc()
1352 if (mpic->flags & MPIC_USES_DCR) in mpic_alloc()
1353 mpic->reg_type = mpic_access_dcr; in mpic_alloc()
1355 BUG_ON(mpic->flags & MPIC_USES_DCR); in mpic_alloc()
1359 mpic_map(mpic, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000); in mpic_alloc()
1360 mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); in mpic_alloc()
1362 if (mpic->flags & MPIC_FSL) { in mpic_alloc()
1370 mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs, in mpic_alloc()
1373 fsl_version = fsl_mpic_get_version(mpic); in mpic_alloc()
1377 * was added in MPIC version 4.1. in mpic_alloc()
1389 ret = mpic_setup_error_int(mpic, intvec_top - 13); in mpic_alloc()
1398 * platforms that don't know the MPIC version at compile-time, in mpic_alloc()
1399 * such as qemu-e500, turn off coreint if this MPIC doesn't in mpic_alloc()
1404 * also disable coreint if the MPIC node doesn't have in mpic_alloc()
1405 * an "fsl,mpic" compatible at all. This will be the case in mpic_alloc()
1414 /* When using a device-node, reset requests are only honored if the MPIC in mpic_alloc()
1417 if (!(mpic->flags & MPIC_NO_RESET)) { in mpic_alloc()
1418 printk(KERN_DEBUG "mpic: Resetting\n"); in mpic_alloc()
1419 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), in mpic_alloc()
1420 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) in mpic_alloc()
1422 while( mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) in mpic_alloc()
1428 if (mpic->flags & MPIC_ENABLE_COREINT) in mpic_alloc()
1429 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), in mpic_alloc()
1430 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) in mpic_alloc()
1433 if (mpic->flags & MPIC_ENABLE_MCK) in mpic_alloc()
1434 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), in mpic_alloc()
1435 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) in mpic_alloc()
1439 * The MPIC driver will crash if there are more cores than we in mpic_alloc()
1448 mpic_map(mpic, mpic->paddr, &mpic->cpuregs[cpu], in mpic_alloc()
1457 greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); in mpic_alloc()
1460 * By default, the last source number comes from the MPIC, but the in mpic_alloc()
1462 * If we get passed an isu_size (multi-isu MPIC) then we use that in mpic_alloc()
1469 of_property_read_u32(mpic->node, "last-interrupt-source", &last_irq); in mpic_alloc()
1476 mpic->num_sources = isu_size; in mpic_alloc()
1477 mpic_map(mpic, mpic->paddr, &mpic->isus[0], in mpic_alloc()
1482 mpic->isu_size = isu_size; in mpic_alloc()
1483 mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1); in mpic_alloc()
1484 mpic->isu_mask = (1 << mpic->isu_shift) - 1; in mpic_alloc()
1486 mpic->irqhost = irq_domain_add_linear(mpic->node, in mpic_alloc()
1488 &mpic_host_ops, mpic); in mpic_alloc()
1491 * FIXME: The code leaks the MPIC object and mappings here; this in mpic_alloc()
1494 if (mpic->irqhost == NULL) in mpic_alloc()
1512 printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx," in mpic_alloc()
1514 name, vers, (unsigned long long)mpic->paddr, num_possible_cpus()); in mpic_alloc()
1515 printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n", in mpic_alloc()
1516 mpic->isu_size, mpic->isu_shift, mpic->isu_mask); in mpic_alloc()
1518 mpic->next = mpics; in mpic_alloc()
1519 mpics = mpic; in mpic_alloc()
1521 if (!(mpic->flags & MPIC_SECONDARY)) { in mpic_alloc()
1522 mpic_primary = mpic; in mpic_alloc()
1523 irq_set_default_host(mpic->irqhost); in mpic_alloc()
1526 return mpic; in mpic_alloc()
1533 void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, in mpic_assign_isu() argument
1536 unsigned int isu_first = isu_num * mpic->isu_size; in mpic_assign_isu()
1540 mpic_map(mpic, in mpic_assign_isu()
1541 paddr, &mpic->isus[isu_num], 0, in mpic_assign_isu()
1542 MPIC_INFO(IRQ_STRIDE) * mpic->isu_size); in mpic_assign_isu()
1544 if ((isu_first + mpic->isu_size) > mpic->num_sources) in mpic_assign_isu()
1545 mpic->num_sources = isu_first + mpic->isu_size; in mpic_assign_isu()
1548 void __init mpic_init(struct mpic *mpic) in mpic_init() argument
1553 BUG_ON(mpic->num_sources == 0); in mpic_init()
1555 printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); in mpic_init()
1560 if (mpic->flags & MPIC_FSL) { in mpic_init()
1561 u32 version = fsl_mpic_get_version(mpic); in mpic_init()
1564 * Timer group B is present at the latest in MPIC 3.1 (e.g. in mpic_init()
1565 * mpc8536). It is not present in MPIC 2.0 (e.g. mpc8544). in mpic_init()
1575 unsigned int offset = mpic_tm_offset(mpic, i); in mpic_init()
1577 mpic_write(mpic->tmregs, in mpic_init()
1580 mpic_write(mpic->tmregs, in mpic_init()
1584 (mpic->timer_vecs[0] + i)); in mpic_init()
1588 mpic_test_broken_ipi(mpic); in mpic_init()
1593 (mpic->ipi_vecs[0] + i)); in mpic_init()
1596 /* Do the HT PIC fixups on U3 broken mpic */ in mpic_init()
1597 DBG("MPIC flags: %x\n", mpic->flags); in mpic_init()
1598 if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) { in mpic_init()
1599 mpic_scan_ht_pics(mpic); in mpic_init()
1600 mpic_u3msi_init(mpic); in mpic_init()
1603 mpic_pasemi_msi_init(mpic); in mpic_init()
1605 cpu = mpic_processor_id(mpic); in mpic_init()
1607 if (!(mpic->flags & MPIC_NO_RESET)) { in mpic_init()
1608 for (i = 0; i < mpic->num_sources; i++) { in mpic_init()
1614 if (mpic->protected && test_bit(i, mpic->protected)) in mpic_init()
1623 mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), mpic->spurious_vec); in mpic_init()
1626 if (!(mpic->flags & MPIC_NO_PTHROU_DIS)) in mpic_init()
1627 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), in mpic_init()
1628 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) in mpic_init()
1631 if (mpic->flags & MPIC_NO_BIAS) in mpic_init()
1632 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), in mpic_init()
1633 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) in mpic_init()
1640 /* allocate memory to save mpic state */ in mpic_init()
1641 mpic->save_data = kmalloc_array(mpic->num_sources, in mpic_init()
1642 sizeof(*mpic->save_data), in mpic_init()
1644 BUG_ON(mpic->save_data == NULL); in mpic_init()
1647 /* Check if this MPIC is chained from a parent interrupt controller */ in mpic_init()
1648 if (mpic->flags & MPIC_SECONDARY) { in mpic_init()
1649 int virq = irq_of_parse_and_map(mpic->node, 0); in mpic_init()
1652 mpic->node, virq); in mpic_init()
1653 irq_set_handler_data(virq, mpic); in mpic_init()
1658 /* FSL mpic error interrupt initialization */ in mpic_init()
1659 if (mpic->flags & MPIC_FSL_HAS_EIMR) in mpic_init()
1660 mpic_err_int_init(mpic, MPIC_FSL_ERR_INT); in mpic_init()
1665 struct mpic *mpic = mpic_find(irq); in mpic_irq_set_priority() local
1670 if (!mpic) in mpic_irq_set_priority()
1674 if (mpic_is_ipi(mpic, src)) { in mpic_irq_set_priority()
1675 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & in mpic_irq_set_priority()
1677 mpic_ipi_write(src - mpic->ipi_vecs[0], in mpic_irq_set_priority()
1679 } else if (mpic_is_tm(mpic, src)) { in mpic_irq_set_priority()
1680 reg = mpic_tm_read(src - mpic->timer_vecs[0]) & in mpic_irq_set_priority()
1682 mpic_tm_write(src - mpic->timer_vecs[0], in mpic_irq_set_priority()
1696 struct mpic *mpic = mpic_primary; in mpic_setup_this_cpu() local
1701 BUG_ON(mpic == NULL); in mpic_setup_this_cpu()
1703 DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); in mpic_setup_this_cpu()
1707 /* let the mpic know we want intrs. default affinity is 0xffffffff in mpic_setup_this_cpu()
1712 if (distribute_irqs && !(mpic->flags & MPIC_SINGLE_DEST_CPU)) { in mpic_setup_this_cpu()
1713 for (i = 0; i < mpic->num_sources ; i++) in mpic_setup_this_cpu()
1727 struct mpic *mpic = mpic_primary; in mpic_cpu_get_priority() local
1734 struct mpic *mpic = mpic_primary; in mpic_cpu_set_priority() local
1742 struct mpic *mpic = mpic_primary; in mpic_teardown_this_cpu() local
1747 BUG_ON(mpic == NULL); in mpic_teardown_this_cpu()
1749 DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); in mpic_teardown_this_cpu()
1752 /* let the mpic know we don't want intrs. */ in mpic_teardown_this_cpu()
1753 for (i = 0; i < mpic->num_sources ; i++) in mpic_teardown_this_cpu()
1759 /* We need to EOI the IPI since not all platforms reset the MPIC in mpic_teardown_this_cpu()
1762 mpic_eoi(mpic); in mpic_teardown_this_cpu()
1768 static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg) in _mpic_get_one_irq() argument
1774 DBG("%s: get_one_irq(reg 0x%x): %d\n", mpic->name, reg, src); in _mpic_get_one_irq()
1776 if (unlikely(src == mpic->spurious_vec)) { in _mpic_get_one_irq()
1777 if (mpic->flags & MPIC_SPV_EOI) in _mpic_get_one_irq()
1778 mpic_eoi(mpic); in _mpic_get_one_irq()
1781 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { in _mpic_get_one_irq()
1783 mpic->name, (int)src); in _mpic_get_one_irq()
1784 mpic_eoi(mpic); in _mpic_get_one_irq()
1788 return irq_linear_revmap(mpic->irqhost, src); in _mpic_get_one_irq()
1791 unsigned int mpic_get_one_irq(struct mpic *mpic) in mpic_get_one_irq() argument
1793 return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_INTACK)); in mpic_get_one_irq()
1798 struct mpic *mpic = mpic_primary; in mpic_get_irq() local
1800 BUG_ON(mpic == NULL); in mpic_get_irq()
1802 return mpic_get_one_irq(mpic); in mpic_get_irq()
1808 struct mpic *mpic = mpic_primary; in mpic_get_coreint_irq() local
1811 BUG_ON(mpic == NULL); in mpic_get_coreint_irq()
1815 if (unlikely(src == mpic->spurious_vec)) { in mpic_get_coreint_irq()
1816 if (mpic->flags & MPIC_SPV_EOI) in mpic_get_coreint_irq()
1817 mpic_eoi(mpic); in mpic_get_coreint_irq()
1820 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { in mpic_get_coreint_irq()
1822 mpic->name, (int)src); in mpic_get_coreint_irq()
1826 return irq_linear_revmap(mpic->irqhost, src); in mpic_get_coreint_irq()
1834 struct mpic *mpic = mpic_primary; in mpic_get_mcirq() local
1836 BUG_ON(mpic == NULL); in mpic_get_mcirq()
1838 return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_MCACK)); in mpic_get_mcirq()
1844 struct mpic *mpic = mpic_primary; in mpic_request_ipis() local
1846 BUG_ON(mpic == NULL); in mpic_request_ipis()
1848 printk(KERN_INFO "mpic: requesting IPIs...\n"); in mpic_request_ipis()
1851 unsigned int vipi = irq_create_mapping(mpic->irqhost, in mpic_request_ipis()
1852 mpic->ipi_vecs[0] + i); in mpic_request_ipis()
1863 struct mpic *mpic = mpic_primary; in smp_mpic_message_pass() local
1866 BUG_ON(mpic == NULL); in smp_mpic_message_pass()
1876 DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, msg); in smp_mpic_message_pass()
1906 struct mpic *mpic = mpic_primary; in mpic_reset_core() local
1912 pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); in mpic_reset_core()
1914 mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); in mpic_reset_core()
1915 mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); in mpic_reset_core()
1919 mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); in mpic_reset_core()
1920 mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); in mpic_reset_core()
1924 if (mpic->flags & MPIC_FSL) { in mpic_reset_core()
1926 _mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid], in mpic_reset_core()
1934 static void mpic_suspend_one(struct mpic *mpic) in mpic_suspend_one() argument
1938 for (i = 0; i < mpic->num_sources; i++) { in mpic_suspend_one()
1939 mpic->save_data[i].vecprio = in mpic_suspend_one()
1941 mpic->save_data[i].dest = in mpic_suspend_one()
1948 struct mpic *mpic = mpics; in mpic_suspend() local
1950 while (mpic) { in mpic_suspend()
1951 mpic_suspend_one(mpic); in mpic_suspend()
1952 mpic = mpic->next; in mpic_suspend()
1958 static void mpic_resume_one(struct mpic *mpic) in mpic_resume_one() argument
1962 for (i = 0; i < mpic->num_sources; i++) { in mpic_resume_one()
1964 mpic->save_data[i].vecprio); in mpic_resume_one()
1966 mpic->save_data[i].dest); in mpic_resume_one()
1969 if (mpic->fixups) { in mpic_resume_one()
1970 struct mpic_irq_fixup *fixup = &mpic->fixups[i]; in mpic_resume_one()
1974 if ((mpic->save_data[i].fixup_data & 1) == 0) in mpic_resume_one()
1980 writel(mpic->save_data[i].fixup_data & ~1, in mpic_resume_one()
1990 struct mpic *mpic = mpics; in mpic_resume() local
1992 while (mpic) { in mpic_resume()
1993 mpic_resume_one(mpic); in mpic_resume()
1994 mpic = mpic->next; in mpic_resume()
2011 pr_err("mpic: Failed to register subsystem!\n"); in mpic_init_sys()