1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2014-2016 IBM Corp.
7 #include <misc/cxl-base.h>
8 #include <asm/pnv-pci.h>
15 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_phb_to_cxl_mode()
16 	struct pnv_phb *phb = hose->private_data;  in pnv_phb_to_cxl_mode()
22 		return -ENODEV;  in pnv_phb_to_cxl_mode()
26 	rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number);  in pnv_phb_to_cxl_mode()
28 		dev_err(&dev->dev, "Required cxl mode not supported by firmware - update skiboot\n");  in pnv_phb_to_cxl_mode()
30 		dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc);  in pnv_phb_to_cxl_mode()
39 int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num)  in pnv_cxl_alloc_hwirqs()  argument
41 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_cxl_alloc_hwirqs()
42 	struct pnv_phb *phb = hose->private_data;  in pnv_cxl_alloc_hwirqs()
43 	int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num);  in pnv_cxl_alloc_hwirqs()
46 		dev_warn(&dev->dev, "Failed to find a free MSI\n");  in pnv_cxl_alloc_hwirqs()
47 		return -ENOSPC;  in pnv_cxl_alloc_hwirqs()
50 	return phb->msi_base + hwirq;  in pnv_cxl_alloc_hwirqs()
54 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num)  in pnv_cxl_release_hwirqs()  argument
56 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_cxl_release_hwirqs()
57 	struct pnv_phb *phb = hose->private_data;  in pnv_cxl_release_hwirqs()
59 	msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, num);  in pnv_cxl_release_hwirqs()
66 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_cxl_release_hwirq_ranges()
67 	struct pnv_phb *phb = hose->private_data;  in pnv_cxl_release_hwirq_ranges()
71 		if (!irqs->range[i])  in pnv_cxl_release_hwirq_ranges()
74 			 i, irqs->offset[i],  in pnv_cxl_release_hwirq_ranges()
75 			 irqs->range[i]);  in pnv_cxl_release_hwirq_ranges()
76 		hwirq = irqs->offset[i] - phb->msi_base;  in pnv_cxl_release_hwirq_ranges()
77 		msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq,  in pnv_cxl_release_hwirq_ranges()
78 				       irqs->range[i]);  in pnv_cxl_release_hwirq_ranges()
84 			       struct pci_dev *dev, int num)  in pnv_cxl_alloc_hwirq_ranges()  argument
86 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_cxl_alloc_hwirq_ranges()
87 	struct pnv_phb *phb = hose->private_data;  in pnv_cxl_alloc_hwirq_ranges()
93 	for (i = 1; i < CXL_IRQ_RANGES && num; i++) {  in pnv_cxl_alloc_hwirq_ranges()
94 		try = num;  in pnv_cxl_alloc_hwirq_ranges()
96 			hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, try);  in pnv_cxl_alloc_hwirq_ranges()
104 		irqs->offset[i] = phb->msi_base + hwirq;  in pnv_cxl_alloc_hwirq_ranges()
105 		irqs->range[i] = try;  in pnv_cxl_alloc_hwirq_ranges()
107 			 i, irqs->offset[i], irqs->range[i]);  in pnv_cxl_alloc_hwirq_ranges()
108 		num -= try;  in pnv_cxl_alloc_hwirq_ranges()
110 	if (num)  in pnv_cxl_alloc_hwirq_ranges()
116 	return -ENOSPC;  in pnv_cxl_alloc_hwirq_ranges()
122 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_cxl_get_irq_count()
123 	struct pnv_phb *phb = hose->private_data;  in pnv_cxl_get_irq_count()
125 	return phb->msi_bmp.irq_count;  in pnv_cxl_get_irq_count()
132 	struct pci_controller *hose = pci_bus_to_host(dev->bus);  in pnv_cxl_ioda_msi_setup()
133 	struct pnv_phb *phb = hose->private_data;  in pnv_cxl_ioda_msi_setup()
134 	unsigned int xive_num = hwirq - phb->msi_base;  in pnv_cxl_ioda_msi_setup()
139 		return -ENODEV;  in pnv_cxl_ioda_msi_setup()
142 	rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num);  in pnv_cxl_ioda_msi_setup()
146 			pci_name(dev), rc, phb->msi_base, hwirq, xive_num);  in pnv_cxl_ioda_msi_setup()
147 		return -EIO;  in pnv_cxl_ioda_msi_setup()