Lines Matching +full:0 +full:xff400000
14 #define SS_MEMSAVE 0x00 /* First 8 bytes of RAM */
15 #define SS_HID 0x08 /* 3 HIDs */
16 #define SS_IABR 0x14 /* 2 IABRs */
17 #define SS_IBCR 0x1c
18 #define SS_DABR 0x20 /* 2 DABRs */
19 #define SS_DBCR 0x28
20 #define SS_SP 0x2c
21 #define SS_SR 0x30 /* 16 segment registers */
22 #define SS_R2 0x70
23 #define SS_MSR 0x74
24 #define SS_SDR1 0x78
25 #define SS_LR 0x7c
26 #define SS_SPRG 0x80 /* 8 SPRGs */
27 #define SS_DBAT 0xa0 /* 8 DBATs */
28 #define SS_IBAT 0xe0 /* 8 IBATs */
29 #define SS_TB 0x120
30 #define SS_CR 0x128
31 #define SS_GPREG 0x12c /* r12-r31 */
32 #define STATE_SAVE_SIZE 0x17c
40 .long 0
53 * The first word is the magic number 0xf5153ae5, and the second
63 lwz r5, 0(r4)
66 stw r5, SS_MEMSAVE+0(r3)
74 stw r5, SS_HID+0(r3)
85 stw r4, SS_IABR+0(r3)
88 stw r7, SS_DABR+0(r3)
98 stw r4, SS_SPRG+0(r3)
119 stw r4, SS_DBAT+0x00(r3)
120 stw r5, SS_DBAT+0x04(r3)
121 stw r6, SS_DBAT+0x08(r3)
122 stw r7, SS_DBAT+0x0c(r3)
129 stw r4, SS_DBAT+0x10(r3)
130 stw r5, SS_DBAT+0x14(r3)
131 stw r6, SS_DBAT+0x18(r3)
132 stw r7, SS_DBAT+0x1c(r3)
139 stw r4, SS_DBAT+0x20(r3)
140 stw r5, SS_DBAT+0x24(r3)
141 stw r6, SS_DBAT+0x28(r3)
142 stw r7, SS_DBAT+0x2c(r3)
149 stw r4, SS_DBAT+0x30(r3)
150 stw r5, SS_DBAT+0x34(r3)
151 stw r6, SS_DBAT+0x38(r3)
152 stw r7, SS_DBAT+0x3c(r3)
159 stw r4, SS_IBAT+0x00(r3)
160 stw r5, SS_IBAT+0x04(r3)
161 stw r6, SS_IBAT+0x08(r3)
162 stw r7, SS_IBAT+0x0c(r3)
169 stw r4, SS_IBAT+0x10(r3)
170 stw r5, SS_IBAT+0x14(r3)
171 stw r6, SS_IBAT+0x18(r3)
172 stw r7, SS_IBAT+0x1c(r3)
179 stw r4, SS_IBAT+0x20(r3)
180 stw r5, SS_IBAT+0x24(r3)
181 stw r6, SS_IBAT+0x28(r3)
182 stw r7, SS_IBAT+0x2c(r3)
189 stw r4, SS_IBAT+0x30(r3)
190 stw r5, SS_IBAT+0x34(r3)
191 stw r6, SS_IBAT+0x38(r3)
192 stw r7, SS_IBAT+0x3c(r3)
210 stw r4, SS_TB+0(r3)
215 li r4, 0
219 addis r4, r4, 0x1000
220 cmpwi r4, 0
225 rlwinm r4, r4, 0, ~MSR_CE
226 rlwinm r4, r4, 0, ~MSR_ME
230 #define TMP_VIRT_IMMR 0xf0000000
231 #define DEFAULT_IMMR_VALUE 0xff400000
232 #define IMMRBAR_BASE 0x0000
239 ori r4, r4, 0x002a
242 ori r4, r8, 0x001e /* 1 MByte accessible from Kernel Space only */
249 ori r4, r4, 0x002a
251 lis r9, (TMP_VIRT_IMMR + 0x01000000)@h
252 ori r4, r9, 0x001e /* 1 MByte accessible from Kernel Space only */
261 li r4, 0x0002
264 ori r4, r4, 0x001e /* 1 MByte accessible from Kernel Space only */
283 lis r6, 0xf515
284 ori r6, r6, 0x3ae5
291 stw r6, 0(r5)
296 li r4, 0
297 stw r4, 0x0024(r8)
298 stw r4, 0x002c(r8)
299 stw r4, 0x0034(r8)
300 stw r4, 0x003c(r8)
301 stw r4, 0x0064(r8)
302 stw r4, 0x006c(r8)
313 lwz r3, 0x0b04(r8)
325 lwz r4, 0(r4)
335 lwz r4, 0x0904(r8)
336 andis. r4, r4, 0x0400
337 li r4, 0
339 lis r4, 0xff80
341 stw r4, 0x0020(r8)
342 lis r7, 0x8000
343 ori r7, r7, 0x0016
346 rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
362 stw r7, 0x0024(r8)
376 rlwinm r4, r4, 0, ~(MSR_IR | MSR_DR)
388 lwz r5, SS_MEMSAVE+0(r3)
391 stw r5, 0(0)
392 stw r6, 4(0)
394 lwz r5, SS_HID+0(r3)
403 lwz r4, SS_IABR+0(r3)
406 lwz r7, SS_DABR+0(r3)
417 li r4, 0
421 addis r4, r4, 0x1000
422 cmpwi r4, 0
425 lwz r4, SS_DBAT+0x00(r3)
426 lwz r5, SS_DBAT+0x04(r3)
427 lwz r6, SS_DBAT+0x08(r3)
428 lwz r7, SS_DBAT+0x0c(r3)
435 lwz r4, SS_DBAT+0x10(r3)
436 lwz r5, SS_DBAT+0x14(r3)
437 lwz r6, SS_DBAT+0x18(r3)
438 lwz r7, SS_DBAT+0x1c(r3)
445 lwz r4, SS_DBAT+0x20(r3)
446 lwz r5, SS_DBAT+0x24(r3)
447 lwz r6, SS_DBAT+0x28(r3)
448 lwz r7, SS_DBAT+0x2c(r3)
455 lwz r4, SS_DBAT+0x30(r3)
456 lwz r5, SS_DBAT+0x34(r3)
457 lwz r6, SS_DBAT+0x38(r3)
458 lwz r7, SS_DBAT+0x3c(r3)
465 lwz r4, SS_IBAT+0x00(r3)
466 lwz r5, SS_IBAT+0x04(r3)
467 lwz r6, SS_IBAT+0x08(r3)
468 lwz r7, SS_IBAT+0x0c(r3)
475 lwz r4, SS_IBAT+0x10(r3)
476 lwz r5, SS_IBAT+0x14(r3)
477 lwz r6, SS_IBAT+0x18(r3)
478 lwz r7, SS_IBAT+0x1c(r3)
485 lwz r4, SS_IBAT+0x20(r3)
486 lwz r5, SS_IBAT+0x24(r3)
487 lwz r6, SS_IBAT+0x28(r3)
488 lwz r7, SS_IBAT+0x2c(r3)
495 lwz r4, SS_IBAT+0x30(r3)
496 lwz r5, SS_IBAT+0x34(r3)
497 lwz r6, SS_IBAT+0x38(r3)
498 lwz r7, SS_IBAT+0x3c(r3)
515 lwz r4, SS_SPRG+0(r3)
537 li r4, 0
540 lwz r4, SS_TB+0(r3)