platforms/52xx/mpc52xx_pic.c

26  * group has 3 irqs, External IRQ0, slice timer 0 irq, and wake from deep
27  * sleep.  Main group include the other 3 external IRQs, slice timer 1, RTC,
65  * for external interrupts.  The irq_chip structures provide the hooks needed
71  * you'll also notice that there is an irq_chip defined for external
72  * interrupts even though there is no external interrupt group.  The reason
73  * for this is that the four external interrupts are all managed with the same
74  * register even though one of the external IRQs is in the critical group and
76  * the 4 external irqs to be managed using a separate set of hooks.  The
78  * group, only external interrupt is actually support at this time by this
79  * driver and since external interrupt is the only one used, it can just
80  * be directed to make use of the external irq irq_chip.
89  * associated with external interrupt sources on the MPC5200 (just because
93  * External interrupts:
94  * <0 0 n>	external irq0, n is sense	(n=0: level high,
95  * <1 1 n>	external irq1, n is sense	 n=1: edge rising,
96  * <1 2 n>	external irq2, n is sense	 n=2: edge falling,
97  * <1 3 n>	external irq3, n is sense	 n=3: level low)
206 	.name = "MPC52xx External",
294  * mpc52xx_is_extirq - Returns true if hwirq number is for an external IRQ
353 	 * External IRQs are handled differently by the hardware so they are  in mpc52xx_irqhost_map()
366 		pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",  in mpc52xx_irqhost_map()
433 			0x00001000 |	/* MEE master external enable */  in mpc52xx_init_irq()