139 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_unmask()  local
142 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_unmask()
143 	setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);  in mpc52xx_gpt_irq_unmask()
144 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_unmask()
149 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_mask()  local
152 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_mask()
153 	clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);  in mpc52xx_gpt_irq_mask()
154 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_mask()
159 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_ack()  local
161 	out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);  in mpc52xx_gpt_irq_ack()
166 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_set_type()  local
170 	dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, d->irq, flow_type);  in mpc52xx_gpt_irq_set_type()
172 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_set_type()
173 	reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;  in mpc52xx_gpt_irq_set_type()
178 	out_be32(&gpt->regs->mode, reg);  in mpc52xx_gpt_irq_set_type()
179 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_set_type()
194 	struct mpc52xx_gpt_priv *gpt = irq_desc_get_handler_data(desc);  in mpc52xx_gpt_irq_cascade()  local
197 	status = in_be32(&gpt->regs->status) & MPC52xx_GPT_STATUS_IRQMASK;  in mpc52xx_gpt_irq_cascade()
199 		generic_handle_domain_irq(gpt->irqhost, 0);  in mpc52xx_gpt_irq_cascade()
205 	struct mpc52xx_gpt_priv *gpt = h->host_data;  in mpc52xx_gpt_irq_map()  local
207 	dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);  in mpc52xx_gpt_irq_map()
208 	irq_set_chip_data(virq, gpt);  in mpc52xx_gpt_irq_map()
219 	struct mpc52xx_gpt_priv *gpt = h->host_data;  in mpc52xx_gpt_irq_xlate()  local
221 	dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);  in mpc52xx_gpt_irq_xlate()
224 		dev_err(gpt->dev, "bad irq specifier in %pOF\n", ct);  in mpc52xx_gpt_irq_xlate()
240 mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)  in mpc52xx_gpt_irq_setup()  argument
250 	gpt->irqhost = irq_domain_add_linear(node, 1, &mpc52xx_gpt_irq_ops, gpt);  in mpc52xx_gpt_irq_setup()
251 	if (!gpt->irqhost) {  in mpc52xx_gpt_irq_setup()
252 		dev_err(gpt->dev, "irq_domain_add_linear() failed\n");  in mpc52xx_gpt_irq_setup()
256 	irq_set_handler_data(cascade_virq, gpt);  in mpc52xx_gpt_irq_setup()
262 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_setup()
263 	mode = in_be32(&gpt->regs->mode);  in mpc52xx_gpt_irq_setup()
265 		out_be32(&gpt->regs->mode, mode | MPC52xx_GPT_MODE_MS_IC);  in mpc52xx_gpt_irq_setup()
266 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_setup()
268 	dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);  in mpc52xx_gpt_irq_setup()
278 	struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);  in mpc52xx_gpt_gpio_get()  local
280 	return (in_be32(&gpt->regs->status) >> 8) & 1;  in mpc52xx_gpt_gpio_get()
286 	struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);  in mpc52xx_gpt_gpio_set()  local
290 	dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v);  in mpc52xx_gpt_gpio_set()
293 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_gpio_set()
294 	clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK, r);  in mpc52xx_gpt_gpio_set()
295 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_gpio_set()
300 	struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);  in mpc52xx_gpt_gpio_dir_in()  local
303 	dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);  in mpc52xx_gpt_gpio_dir_in()
305 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_gpio_dir_in()
306 	clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK);  in mpc52xx_gpt_gpio_dir_in()
307 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_gpio_dir_in()
319 static void mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt)  in mpc52xx_gpt_gpio_setup()  argument
324 	if (!device_property_present(gpt->dev, "gpio-controller"))  in mpc52xx_gpt_gpio_setup()
327 	gpt->gc.label = kasprintf(GFP_KERNEL, "%pfw", dev_fwnode(gpt->dev));  in mpc52xx_gpt_gpio_setup()
328 	if (!gpt->gc.label) {  in mpc52xx_gpt_gpio_setup()
329 		dev_err(gpt->dev, "out of memory\n");  in mpc52xx_gpt_gpio_setup()
333 	gpt->gc.ngpio = 1;  in mpc52xx_gpt_gpio_setup()
334 	gpt->gc.direction_input  = mpc52xx_gpt_gpio_dir_in;  in mpc52xx_gpt_gpio_setup()
335 	gpt->gc.direction_output = mpc52xx_gpt_gpio_dir_out;  in mpc52xx_gpt_gpio_setup()
336 	gpt->gc.get = mpc52xx_gpt_gpio_get;  in mpc52xx_gpt_gpio_setup()
337 	gpt->gc.set = mpc52xx_gpt_gpio_set;  in mpc52xx_gpt_gpio_setup()
338 	gpt->gc.base = -1;  in mpc52xx_gpt_gpio_setup()
339 	gpt->gc.parent = gpt->dev;  in mpc52xx_gpt_gpio_setup()
342 	clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,  in mpc52xx_gpt_gpio_setup()
345 	rc = gpiochip_add_data(&gpt->gc, gpt);  in mpc52xx_gpt_gpio_setup()
347 		dev_err(gpt->dev, "gpiochip_add_data() failed; rc=%i\n", rc);  in mpc52xx_gpt_gpio_setup()
349 	dev_dbg(gpt->dev, "%s() complete.\n", __func__);  in mpc52xx_gpt_gpio_setup()
352 static void mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt) { }  in mpc52xx_gpt_gpio_setup()  argument
365 	struct mpc52xx_gpt_priv *gpt;  in mpc52xx_gpt_from_irq()  local
371 		gpt = container_of(pos, struct mpc52xx_gpt_priv, list);  in mpc52xx_gpt_from_irq()
372 		if (gpt->irqhost && irq == irq_linear_revmap(gpt->irqhost, 0)) {  in mpc52xx_gpt_from_irq()
374 			return gpt;  in mpc52xx_gpt_from_irq()
383 static int mpc52xx_gpt_do_start(struct mpc52xx_gpt_priv *gpt, u64 period,  in mpc52xx_gpt_do_start()  argument
403 	clocks = period * (u64)gpt->ipb_freq;  in mpc52xx_gpt_do_start()
431 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_do_start()
433 		gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;  in mpc52xx_gpt_do_start()
434 	else if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) {  in mpc52xx_gpt_do_start()
435 		raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_do_start()
438 	out_be32(&gpt->regs->count, prescale << 16 | clocks);  in mpc52xx_gpt_do_start()
439 	clrsetbits_be32(&gpt->regs->mode, clear, set);  in mpc52xx_gpt_do_start()
440 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_do_start()
453 int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,  in mpc52xx_gpt_start_timer()  argument
456 	return mpc52xx_gpt_do_start(gpt, period, continuous, 0);  in mpc52xx_gpt_start_timer()
466 int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt)  in mpc52xx_gpt_stop_timer()  argument
471 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_stop_timer()
472 	if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) {  in mpc52xx_gpt_stop_timer()
473 		raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_stop_timer()
477 	clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_COUNTER_ENABLE);  in mpc52xx_gpt_stop_timer()
478 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_stop_timer()
489 u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt)  in mpc52xx_gpt_timer_period()  argument
495 	raw_spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_timer_period()
496 	period = in_be32(&gpt->regs->count);  in mpc52xx_gpt_timer_period()
497 	raw_spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_timer_period()
504 	do_div(period, gpt->ipb_freq);  in mpc52xx_gpt_timer_period()
673 static int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,  in mpc52xx_gpt_wdt_setup()  argument
679 	mpc52xx_gpt_wdt = gpt;  in mpc52xx_gpt_wdt_setup()
686 	if (mpc52xx_gpt_do_start(gpt, real_timeout, 0, 1))  in mpc52xx_gpt_wdt_setup()
687 		dev_warn(gpt->dev, "starting as wdt failed\n");  in mpc52xx_gpt_wdt_setup()
689 		dev_info(gpt->dev, "watchdog set to %us timeout\n", *period);  in mpc52xx_gpt_wdt_setup()
700 static inline int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,  in mpc52xx_gpt_wdt_setup()  argument
713 	struct mpc52xx_gpt_priv *gpt;  in mpc52xx_gpt_probe()  local
715 	gpt = devm_kzalloc(&ofdev->dev, sizeof *gpt, GFP_KERNEL);  in mpc52xx_gpt_probe()
716 	if (!gpt)  in mpc52xx_gpt_probe()
719 	raw_spin_lock_init(&gpt->lock);  in mpc52xx_gpt_probe()
720 	gpt->dev = &ofdev->dev;  in mpc52xx_gpt_probe()
721 	gpt->ipb_freq = mpc5xxx_get_bus_frequency(&ofdev->dev);  in mpc52xx_gpt_probe()
722 	gpt->regs = of_iomap(ofdev->dev.of_node, 0);  in mpc52xx_gpt_probe()
723 	if (!gpt->regs)  in mpc52xx_gpt_probe()
726 	dev_set_drvdata(&ofdev->dev, gpt);  in mpc52xx_gpt_probe()
728 	mpc52xx_gpt_gpio_setup(gpt);  in mpc52xx_gpt_probe()
729 	mpc52xx_gpt_irq_setup(gpt, ofdev->dev.of_node);  in mpc52xx_gpt_probe()
732 	list_add(&gpt->list, &mpc52xx_gpt_list);  in mpc52xx_gpt_probe()
740 		gpt->wdt_mode = MPC52xx_GPT_CAN_WDT;  in mpc52xx_gpt_probe()
744 			dev_info(gpt->dev, "used as watchdog\n");  in mpc52xx_gpt_probe()
745 			gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;  in mpc52xx_gpt_probe()
747 			dev_info(gpt->dev, "can function as watchdog\n");  in mpc52xx_gpt_probe()
748 		mpc52xx_gpt_wdt_setup(gpt, on_boot_wdt);  in mpc52xx_gpt_probe()