Lines Matching refs:mbase

1234 	void __iomem *mbase;  in ppc460sx_pciex_check_link()  local
1239 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); in ppc460sx_pciex_check_link()
1240 if (mbase == NULL) { in ppc460sx_pciex_check_link()
1246 while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA) in ppc460sx_pciex_check_link()
1253 iounmap(mbase); in ppc460sx_pciex_check_link()
1276 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000, in ppc_476fpe_pciex_check_link() local
1281 if (mbase == NULL) { in ppc_476fpe_pciex_check_link()
1288 val = in_le32(mbase + PECFG_TLDLP); in ppc_476fpe_pciex_check_link()
1301 iounmap(mbase); in ppc_476fpe_pciex_check_link()
1608 void __iomem *mbase, in ppc4xx_setup_one_pciex_POM() argument
1635 out_le32(mbase + PECFG_POM0LAH, pciah); in ppc4xx_setup_one_pciex_POM()
1636 out_le32(mbase + PECFG_POM0LAL, pcial); in ppc4xx_setup_one_pciex_POM()
1658 out_le32(mbase + PECFG_POM1LAH, pciah); in ppc4xx_setup_one_pciex_POM()
1659 out_le32(mbase + PECFG_POM1LAL, pcial); in ppc4xx_setup_one_pciex_POM()
1667 out_le32(mbase + PECFG_POM2LAH, pciah); in ppc4xx_setup_one_pciex_POM()
1668 out_le32(mbase + PECFG_POM2LAL, pcial); in ppc4xx_setup_one_pciex_POM()
1684 void __iomem *mbase) in ppc4xx_configure_pciex_POMs() argument
1703 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, in ppc4xx_configure_pciex_POMs()
1721 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase, in ppc4xx_configure_pciex_POMs()
1731 ppc4xx_setup_one_pciex_POM(port, hose, mbase, in ppc4xx_configure_pciex_POMs()
1738 void __iomem *mbase, in ppc4xx_configure_pciex_PIMs() argument
1757 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); in ppc4xx_configure_pciex_PIMs()
1758 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) | in ppc4xx_configure_pciex_PIMs()
1762 out_le32(mbase + PECFG_BAR1MPA, 0); in ppc4xx_configure_pciex_PIMs()
1763 out_le32(mbase + PECFG_BAR2HMPA, 0); in ppc4xx_configure_pciex_PIMs()
1764 out_le32(mbase + PECFG_BAR2LMPA, 0); in ppc4xx_configure_pciex_PIMs()
1766 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa)); in ppc4xx_configure_pciex_PIMs()
1767 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa)); in ppc4xx_configure_pciex_PIMs()
1769 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr)); in ppc4xx_configure_pciex_PIMs()
1770 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr)); in ppc4xx_configure_pciex_PIMs()
1784 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); in ppc4xx_configure_pciex_PIMs()
1785 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); in ppc4xx_configure_pciex_PIMs()
1790 out_le32(mbase + PECFG_PIM0LAL, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1791 out_le32(mbase + PECFG_PIM0LAH, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1792 out_le32(mbase + PECFG_PIM1LAL, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1793 out_le32(mbase + PECFG_PIM1LAH, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1794 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); in ppc4xx_configure_pciex_PIMs()
1795 out_le32(mbase + PECFG_PIM01SAL, 0x00000000); in ppc4xx_configure_pciex_PIMs()
1797 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start)); in ppc4xx_configure_pciex_PIMs()
1798 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start)); in ppc4xx_configure_pciex_PIMs()
1802 out_le32(mbase + PECFG_PIMEN, 0x1); in ppc4xx_configure_pciex_PIMs()
1805 out_le16(mbase + PCI_COMMAND, in ppc4xx_configure_pciex_PIMs()
1806 in_le16(mbase + PCI_COMMAND) | in ppc4xx_configure_pciex_PIMs()
1816 void __iomem *mbase = NULL, *cfg_data = NULL; in ppc4xx_pciex_port_setup_hose() local
1869 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); in ppc4xx_pciex_port_setup_hose()
1870 if (mbase == NULL) { in ppc4xx_pciex_port_setup_hose()
1875 hose->cfg_addr = mbase; in ppc4xx_pciex_port_setup_hose()
1885 mbase = (void __iomem *)hose->cfg_addr; in ppc4xx_pciex_port_setup_hose()
1891 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno); in ppc4xx_pciex_port_setup_hose()
1892 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1); in ppc4xx_pciex_port_setup_hose()
1893 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno); in ppc4xx_pciex_port_setup_hose()
1899 out_le32(mbase + PECFG_PIMEN, 0); in ppc4xx_pciex_port_setup_hose()
1905 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0) in ppc4xx_pciex_port_setup_hose()
1909 ppc4xx_configure_pciex_POMs(port, hose, mbase); in ppc4xx_pciex_port_setup_hose()
1912 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window); in ppc4xx_pciex_port_setup_hose()
1931 out_le16(mbase + 0x200, val); in ppc4xx_pciex_port_setup_hose()
1942 out_le16(mbase + 0x202, val); in ppc4xx_pciex_port_setup_hose()
1946 out_le16(mbase + 0x204, 0x7); in ppc4xx_pciex_port_setup_hose()
1950 out_le32(mbase + 0x208, 0x06040001); in ppc4xx_pciex_port_setup_hose()
1956 out_le32(mbase + 0x208, 0x0b200001); in ppc4xx_pciex_port_setup_hose()
1968 if (mbase) in ppc4xx_pciex_port_setup_hose()
1969 iounmap(mbase); in ppc4xx_pciex_port_setup_hose()