powerpc/lib/copy_32.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * Memory copy functions for 32-bit PowerPC.
5  * Copyright (C) 1996-2005 Paul Mackerras.
12 #include <asm/code-patching-asm.h>
45 	addi	r5,r5,-(16 * n);		\
48 	addi	r5,r5,-(16 * n);		\
63 CACHELINE_MASK = (L1_CACHE_BYTES-1)
68 	addi	r6, r3, -4
69 	beq-	2f
84  * area is cacheable.  -- paulus
110 	clrlwi	r7,r6,32-LG_CACHELINE_BYTES
113 	addic.	r9,r9,-1	/* total number of complete cachelines */
122 	li	r7,4
126 	clrlwi	r5,r8,32-LG_CACHELINE_BYTES
145 	addi	r6,r3,-1
157  * -- paulus.
179 	addi	r4,r4,-4
180 	addi	r6,r3,-4
187 	andi.	r8,r0,3			/* get it word-aligned first */
204 	clrlwi	r5,r5,32-LG_CACHELINE_BYTES
205 	li	r11,4
249 	addi	r6,r3,-4
250 	addi	r4,r4,-4
264 	addi	r5,r5,-4
283 	rlwinm.	r7,r5,32-3,3,31
289 	rlwinm.	r7,r5,32-3,3,31		/* r0 = r5 >> 3 */
296 1:	lwz	r7,-4(r4)
297 	lwzu	r8,-8(r4)
298 	stw	r7,-4(r6)
299 	stwu	r8,-8(r6)
304 	lwzu	r0,-4(r4)
306 	stwu	r0,-4(r6)
310 4:	lbzu	r0,-1(r4)
311 	stbu	r0,-1(r6)
315 6:	lbzu	r7,-1(r4)
316 	stbu	r7,-1(r6)
319 	rlwinm.	r7,r5,32-3,3,31
325 	addi	r4,r4,-4
326 	addi	r6,r3,-4
333 	andi.	r8,r0,3			/* get it word-aligned first */
355 	clrlwi	r5,r5,32-LG_CACHELINE_BYTES
356 	li	r11,4
360 	li	r3,4
362 	li	r7,0
364 	li	r7,1
371 	li	r7,MAX_COPY_PREFETCH
405 	li	r3,4
406 	li	r7,0
424 65:	li	r3,0
427 /* read fault, initial single-byte copy */
428 100:	li	r9,0
430 /* write fault, initial single-byte copy */
431 101:	li	r9,1
433 	li	r3,0
436 102:	li	r9,0
439 103:	li	r9,1
440 91:	li	r3,2
463 104:	li	r9,0
467 105:	li	r9,1
468 92:	li	r3,LG_CACHELINE_BYTES
473 108:	li	r9,0
476 109:	li	r9,1
478 	li	r3,2
481 110:	li	r9,0
484 111:	li	r9,1
485 94:	li	r5,0
486 	li	r3,0