powerpc/kernel/vector.S

1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <asm/asm-offsets.h>
12 #include <asm/asm-compat.h>
19 	li	r4,VRSTATE_VSCR
34 	li	r4, VRSTATE_VSCR
47  * Note that on 32-bit this can only use registers that will be
48  * restored by fast_exception_return, i.e. r3 - r6, r10 and r11.
69 	li	r4,-1
82 	li	r4,0
86 	li	r4,1
89 	li	r10,VRSTATE_VSCR
111 	li	r4,VRSTATE_VSCR
119 #error This asm code isn't ready for 32-bit kernels
138 	li	r5,MSR_RI
144 	li	r6,1
149 	li	r4,0
158  * usage of floating-point registers.  These routines must be called
166 	.long	0x3f800000	/* 1.0 in single-precision FP */
168 	.long	0x3f000000	/* 0.5 in single-precision FP */
199 	stwu	r1,-64(r1)
201 	stdu	r1,-64(r1)
233 	li	r0,4
235 	li	r6,0
250 	li	r0,4
252 	li	r6,0
268 	li	r0,4
270 	li	r7,0
288 	li	r0,4
290 	li	r7,0
303  * r3 -> destination, r4 -> source.
308 	li	r0,4
311 	li	r6,0
320  * Vector reciprocal square-root estimate, floating point.
322  * by 2 iterations of Newton-Raphson to get sufficient accuracy.
323  * r3 -> destination, r4 -> source.
332 	li	r0,4
336 	li	r6,0
341 	fnmsubs	fr3,fr1,fr3,fr4	/* 1 - s * r * r */
342 	fmadds	fr1,fr2,fr3,fr1	/* r = r + 0.5 * r * (1 - s * r * r) */
345 	fnmsubs	fr3,fr1,fr3,fr4	/* 1 - s * r * r */
346 	fmadds	fr1,fr2,fr3,fr1	/* r = r + 0.5 * r * (1 - s * r * r) */