Lines Matching +full:numbering +full:- +full:space
1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Common pmac/prep/chrp pci routines. -- Cort
37 #include <asm/pci-bridge.h>
40 #include <asm/ppc-pci.h>
50 /* For dynamic PHB numbering on get_phb_number(): max number of PHBs. */
54 * For dynamic PHB numbering: used/free PHBs tracking bitmap.
73 int ret, phb_id = -1; in get_phb_number()
77 * Try fixed PHB numbering first, by checking archs and reading in get_phb_number()
78 * the respective device-tree properties. Firstly, try reading in get_phb_number()
79 * standard "linux,pci-domain", then try reading "ibm,opal-phbid" in get_phb_number()
80 * (only present in powernv OPAL environment), then try device-tree in get_phb_number()
89 ret = of_property_read_u64(dn, "ibm,opal-phbid", &prop); in get_phb_number()
105 phb_id = (int)(prop & (MAX_PHBS - 1)); in get_phb_number()
113 /* If everything fails then fallback to dynamic PHB numbering. */ in get_phb_number()
132 phb->global_number = get_phb_number(dev); in pcibios_alloc_controller()
135 list_add_tail(&phb->list_node, &hose_list); in pcibios_alloc_controller()
138 phb->dn = of_node_get(dev); in pcibios_alloc_controller()
139 phb->is_dynamic = slab_is_available(); in pcibios_alloc_controller()
159 if (phb->global_number < MAX_PHBS) in pcibios_free_controller()
160 clear_bit(phb->global_number, phb_bitmap); in pcibios_free_controller()
161 of_node_put(phb->dn); in pcibios_free_controller()
162 list_del(&phb->list_node); in pcibios_free_controller()
165 if (phb->is_dynamic) in pcibios_free_controller()
182 * (root bus) - it expects .release_data to hold a pointer
198 bridge->release_data; in pcibios_free_controller_deferred()
200 pr_debug("domain %d, dynamic %d\n", phb->global_number, phb->is_dynamic); in pcibios_free_controller_deferred()
217 if (phb->controller_ops.window_alignment) in pcibios_window_alignment()
218 return phb->controller_ops.window_alignment(bus, type); in pcibios_window_alignment()
232 if (hose->controller_ops.setup_bridge) in pcibios_setup_bridge()
233 hose->controller_ops.setup_bridge(bus, type); in pcibios_setup_bridge()
238 struct pci_controller *phb = pci_bus_to_host(dev->bus); in pcibios_reset_secondary_bus()
240 if (phb->controller_ops.reset_secondary_bus) { in pcibios_reset_secondary_bus()
241 phb->controller_ops.reset_secondary_bus(dev); in pcibios_reset_secondary_bus()
286 return hose->pci_io_size; in pcibios_io_size()
288 return resource_size(&hose->io_resource); in pcibios_io_size()
301 if (address >= hose->io_base_virt && in pcibios_vaddr_is_ioport()
302 address < (hose->io_base_virt + size)) { in pcibios_vaddr_is_ioport()
320 if (address >= hose->io_base_phys && in pci_address_to_pio()
321 address < (hose->io_base_phys + size)) { in pci_address_to_pio()
323 (unsigned long)hose->io_base_virt - _IO_BASE; in pci_address_to_pio()
324 ret = base + (address - hose->io_base_phys); in pci_address_to_pio()
341 return hose->global_number; in pci_domain_nr()
357 if (hose->dn == node) in pci_find_hose_for_OF_device()
359 node = node->parent; in pci_find_hose_for_OF_device()
369 if (hose->global_number == domain_nr) in pci_find_controller_for_domain()
388 list_del(&vi->list_node); in ppc_pci_intx_release()
389 irq_dispose_mapping(vi->virq); in ppc_pci_intx_release()
403 if (vi->virq == pdev->irq) { in ppc_pci_unmap_irq_line()
404 kref_put(&vi->kref, ppc_pci_intx_release); in ppc_pci_unmap_irq_line()
437 return -1; in pci_read_irq_line()
441 /* Try to get a mapping from the device-tree */ in pci_read_irq_line()
447 * space and map that through the default controller. We in pci_read_irq_line()
476 pci_dev->irq = virq; in pci_read_irq_line()
480 if (vitmp->virq == virq) { in pci_read_irq_line()
481 kref_get(&vitmp->kref); in pci_read_irq_line()
488 vi->virq = virq; in pci_read_irq_line()
489 kref_init(&vi->kref); in pci_read_irq_line()
490 list_add_tail(&vi->list_node, &intx_list); in pci_read_irq_line()
497 return -1; in pci_read_irq_line()
502 * -- paulus.
506 struct pci_controller *hose = pci_bus_to_host(pdev->bus); in pci_iobar_pfn()
510 return -EINVAL; in pci_iobar_pfn()
513 ioaddr -= (unsigned long)hose->io_base_virt - _IO_BASE; in pci_iobar_pfn()
515 vma->vm_pgoff += (ioaddr + hose->io_base_phys) >> PAGE_SHIFT; in pci_iobar_pfn()
539 struct resource *rp = &pdev->resource[i]; in pci_phys_mem_access_prot()
540 int flags = rp->flags; in pci_phys_mem_access_prot()
546 if (offset < (rp->start & PAGE_MASK) || in pci_phys_mem_access_prot()
547 offset > rp->end) in pci_phys_mem_access_prot()
556 if (found->flags & IORESOURCE_PREFETCH) in pci_phys_mem_access_prot()
561 pr_debug("PCI: Non-PCI map for %llx, prot: %lx\n", in pci_phys_mem_access_prot()
572 struct resource *rp = &hose->io_resource; in pci_legacy_read()
580 offset = (unsigned long)hose->io_base_virt - _IO_BASE; in pci_legacy_read()
583 if (!(rp->flags & IORESOURCE_IO)) in pci_legacy_read()
584 return -ENXIO; in pci_legacy_read()
585 if (offset < rp->start || (offset + size) > rp->end) in pci_legacy_read()
586 return -ENXIO; in pci_legacy_read()
587 addr = hose->io_base_virt + port; in pci_legacy_read()
595 return -EINVAL; in pci_legacy_read()
600 return -EINVAL; in pci_legacy_read()
604 return -EINVAL; in pci_legacy_read()
612 struct resource *rp = &hose->io_resource; in pci_legacy_write()
620 offset = (unsigned long)hose->io_base_virt - _IO_BASE; in pci_legacy_write()
623 if (!(rp->flags & IORESOURCE_IO)) in pci_legacy_write()
624 return -ENXIO; in pci_legacy_write()
625 if (offset < rp->start || (offset + size) > rp->end) in pci_legacy_write()
626 return -ENXIO; in pci_legacy_write()
627 addr = hose->io_base_virt + port; in pci_legacy_write()
640 return -EINVAL; in pci_legacy_write()
645 return -EINVAL; in pci_legacy_write()
649 return -EINVAL; in pci_legacy_write()
659 ((resource_size_t)vma->vm_pgoff) << PAGE_SHIFT; in pci_mmap_legacy_page_range()
660 resource_size_t size = vma->vm_end - vma->vm_start; in pci_mmap_legacy_page_range()
664 pci_domain_nr(bus), bus->number, in pci_mmap_legacy_page_range()
667 (unsigned long long)(offset + size - 1)); in pci_mmap_legacy_page_range()
677 if ((offset + size) > hose->isa_mem_size) { in pci_mmap_legacy_page_range()
679 "Process %s (pid:%d) mapped non-existing PCI legacy memory for 0%04x:%02x\n", in pci_mmap_legacy_page_range()
680 current->comm, current->pid, pci_domain_nr(bus), bus->number); in pci_mmap_legacy_page_range()
681 if (vma->vm_flags & VM_SHARED) in pci_mmap_legacy_page_range()
685 offset += hose->isa_mem_phys; in pci_mmap_legacy_page_range()
687 unsigned long io_offset = (unsigned long)hose->io_base_virt - _IO_BASE; in pci_mmap_legacy_page_range()
689 rp = &hose->io_resource; in pci_mmap_legacy_page_range()
690 if (!(rp->flags & IORESOURCE_IO)) in pci_mmap_legacy_page_range()
691 return -ENXIO; in pci_mmap_legacy_page_range()
692 if (roffset < rp->start || (roffset + size) > rp->end) in pci_mmap_legacy_page_range()
693 return -ENXIO; in pci_mmap_legacy_page_range()
694 offset += hose->io_base_phys; in pci_mmap_legacy_page_range()
696 pr_debug(" -> mapping phys %llx\n", (unsigned long long)offset); in pci_mmap_legacy_page_range()
698 vma->vm_pgoff = offset >> PAGE_SHIFT; in pci_mmap_legacy_page_range()
699 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); in pci_mmap_legacy_page_range()
700 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, in pci_mmap_legacy_page_range()
701 vma->vm_end - vma->vm_start, in pci_mmap_legacy_page_range()
702 vma->vm_page_prot); in pci_mmap_legacy_page_range()
711 if (rsrc->flags & IORESOURCE_IO) { in pci_resource_to_user()
712 pcibios_resource_to_bus(dev->bus, ®ion, in pci_resource_to_user()
723 * That means we may have 64-bit values where some apps only expect in pci_resource_to_user()
724 * 32 (like X itself since it thinks only Sparc has 64-bit MMIO). in pci_resource_to_user()
726 *start = rsrc->start; in pci_resource_to_user()
727 *end = rsrc->end; in pci_resource_to_user()
731 * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
743 * - We can only cope with one IO space range and up to 3 Memory space
745 * space into lots of small contiguous ranges. So we have to coalesce.
747 * - Some busses have IO space not starting at 0, which causes trouble with
751 * - Some 32 bits platforms such as 4xx can have physical space larger than
771 /* If we failed translation or got a zero-sized region in pci_process_bridge_OF_ranges()
779 /* Act based on address space type */ in pci_process_bridge_OF_ranges()
784 " IO 0x%016llx..0x%016llx -> 0x%016llx\n", in pci_process_bridge_OF_ranges()
785 range.cpu_addr, range.cpu_addr + range.size - 1, in pci_process_bridge_OF_ranges()
789 if (hose->pci_io_size) { in pci_process_bridge_OF_ranges()
791 " \\--> Skipped (too many) !\n"); in pci_process_bridge_OF_ranges()
795 /* On 32 bits, limit I/O space to 16MB */ in pci_process_bridge_OF_ranges()
800 hose->io_base_virt = ioremap(range.cpu_addr, in pci_process_bridge_OF_ranges()
806 (unsigned long)hose->io_base_virt; in pci_process_bridge_OF_ranges()
809 * space starting at 0 so we factor in pci_addr in pci_process_bridge_OF_ranges()
811 hose->pci_io_size = range.pci_addr + range.size; in pci_process_bridge_OF_ranges()
812 hose->io_base_phys = range.cpu_addr - range.pci_addr; in pci_process_bridge_OF_ranges()
815 res = &hose->io_resource; in pci_process_bridge_OF_ranges()
820 " MEM 0x%016llx..0x%016llx -> 0x%016llx %s\n", in pci_process_bridge_OF_ranges()
821 range.cpu_addr, range.cpu_addr + range.size - 1, in pci_process_bridge_OF_ranges()
829 " \\--> Skipped (too many) !\n"); in pci_process_bridge_OF_ranges()
832 /* Handles ISA memory hole space here */ in pci_process_bridge_OF_ranges()
836 hose->isa_mem_phys = range.cpu_addr; in pci_process_bridge_OF_ranges()
837 hose->isa_mem_size = range.size; in pci_process_bridge_OF_ranges()
841 hose->mem_offset[memno] = range.cpu_addr - in pci_process_bridge_OF_ranges()
843 res = &hose->mem_resources[memno++]; in pci_process_bridge_OF_ranges()
847 res->name = dev->full_name; in pci_process_bridge_OF_ranges()
848 res->flags = range.flags; in pci_process_bridge_OF_ranges()
849 res->start = range.cpu_addr; in pci_process_bridge_OF_ranges()
850 res->end = range.cpu_addr + range.size - 1; in pci_process_bridge_OF_ranges()
851 res->parent = res->child = res->sibling = NULL; in pci_process_bridge_OF_ranges()
864 return hose->global_number != 0; in pci_proc_domain()
881 struct pci_controller *hose = pci_bus_to_host(dev->bus); in pcibios_fixup_resources()
891 if (dev->is_virtfn) in pcibios_fixup_resources()
897 if (!res->flags) in pcibios_fixup_resources()
900 /* If we're going to re-assign everything, we mark all resources in pcibios_fixup_resources()
901 * as unset (and 0-base them). In addition, we mark BARs starting in pcibios_fixup_resources()
903 * since in that case, we don't want to re-assign anything in pcibios_fixup_resources()
905 pcibios_resource_to_bus(dev->bus, ®, res); in pcibios_fixup_resources()
908 /* Only print message if not re-assigning */ in pcibios_fixup_resources()
912 res->end -= res->start; in pcibios_fixup_resources()
913 res->start = 0; in pcibios_fixup_resources()
914 res->flags |= IORESOURCE_UNSET; in pcibios_fixup_resources()
930 * as Apple "closed" bridge resources and bare-metal pSeries unassigned bridges
936 struct pci_dev *dev = bus->self; in pcibios_uninitialized_bridge_resource()
947 if (res->flags & IORESOURCE_MEM) { in pcibios_uninitialized_bridge_resource()
948 pcibios_resource_to_bus(dev->bus, ®ion, res); in pcibios_uninitialized_bridge_resource()
950 /* If the BAR is non-0 then it's probably been initialized */ in pcibios_uninitialized_bridge_resource()
963 * us for memory space) in pcibios_uninitialized_bridge_resource()
966 if ((hose->mem_resources[i].flags & IORESOURCE_MEM) && in pcibios_uninitialized_bridge_resource()
967 hose->mem_resources[i].start == hose->mem_offset[i]) in pcibios_uninitialized_bridge_resource()
976 /* If the BAR is non-0, then we consider it assigned */ in pcibios_uninitialized_bridge_resource()
977 offset = (unsigned long)hose->io_base_virt - _IO_BASE; in pcibios_uninitialized_bridge_resource()
978 if (((res->start - offset) & 0xfffffffful) != 0) in pcibios_uninitialized_bridge_resource()
981 /* Here, we are a bit different than memory as typically IO space in pcibios_uninitialized_bridge_resource()
982 * starting at low addresses -is- valid. What we do instead if that in pcibios_uninitialized_bridge_resource()
997 /* Fixup resources of a PCI<->PCI bridge */
1003 struct pci_dev *dev = bus->self; in pcibios_fixup_bridge()
1006 if (!res || !res->flags) in pcibios_fixup_bridge()
1008 if (i >= 3 && bus->self->transparent) in pcibios_fixup_bridge()
1013 * of 0 in order to save space. in pcibios_fixup_bridge()
1016 res->flags |= IORESOURCE_UNSET; in pcibios_fixup_bridge()
1017 res->start = 0; in pcibios_fixup_bridge()
1018 res->end = -1; in pcibios_fixup_bridge()
1025 * and clear them out so they get re-assigned later in pcibios_fixup_bridge()
1028 res->flags = 0; in pcibios_fixup_bridge()
1039 if (bus->self != NULL) in pcibios_setup_bus_self()
1050 if (phb->controller_ops.dma_bus_setup) in pcibios_setup_bus_self()
1051 phb->controller_ops.dma_bus_setup(bus); in pcibios_setup_bus_self()
1060 set_dev_node(&dev->dev, pcibus_to_node(dev->bus)); in pcibios_bus_add_device()
1063 set_dma_ops(&dev->dev, pci_dma_ops); in pcibios_bus_add_device()
1064 dev->dev.archdata.dma_offset = PCI_DRAM_OFFSET; in pcibios_bus_add_device()
1067 phb = pci_bus_to_host(dev->bus); in pcibios_bus_add_device()
1068 if (phb->controller_ops.dma_dev_setup) in pcibios_bus_add_device()
1069 phb->controller_ops.dma_dev_setup(dev); in pcibios_bus_add_device()
1089 d = dev_get_msi_domain(&dev->bus->dev); in pcibios_device_add()
1091 dev_set_msi_domain(&dev->dev, d); in pcibios_device_add()
1102 /* When called from the generic PCI probe, read PCI<->PCI bridge in pcibios_fixup_bus()
1103 * bases. This is -not- called when generating the PCI tree from in pcibios_fixup_bus()
1104 * the OF device-tree. in pcibios_fixup_bus()
1116 !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA)) in skip_isa_ioresource_align()
1124 * addresses to be allocated in the 0x000-0x0ff region
1128 * the low 10 bits of the IO address. The 0x00-0xff region
1130 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
1131 * but we want to try to avoid allocating at 0x2900-0x2bff
1132 * which might have be mirrored at 0x0100-0x03ff..
1138 resource_size_t start = res->start; in pcibios_align_resource()
1140 if (res->flags & IORESOURCE_IO) { in pcibios_align_resource()
1161 for (pp = &parent->child; (p = *pp) != NULL; pp = &p->sibling) { in reparent_resources()
1162 if (p->end < res->start) in reparent_resources()
1164 if (res->end < p->start) in reparent_resources()
1166 if (p->start < res->start || p->end > res->end) in reparent_resources()
1167 return -1; /* not completely contained */ in reparent_resources()
1172 return -1; /* didn't find any conflicting entries? */ in reparent_resources()
1173 res->parent = parent; in reparent_resources()
1174 res->child = *firstpp; in reparent_resources()
1175 res->sibling = *pp; in reparent_resources()
1178 for (p = res->child; p != NULL; p = p->sibling) { in reparent_resources()
1179 p->parent = res; in reparent_resources()
1181 p->name, p, res->name); in reparent_resources()
1189 * On the other hand, we cannot just re-allocate all devices, as it would
1195 * - I/O or memory regions not configured
1196 * - regions configured, but not enabled in the command register
1197 * - bogus I/O addresses above 64K used
1198 * - expansion ROMs left enabled (this may sound harmless, but given
1204 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
1226 pci_domain_nr(bus), bus->number); in pcibios_allocate_bus_resources()
1229 if (!res || !res->flags || res->start > res->end || res->parent) in pcibios_allocate_bus_resources()
1233 if (res->flags & IORESOURCE_UNSET) in pcibios_allocate_bus_resources()
1236 if (bus->parent == NULL) in pcibios_allocate_bus_resources()
1237 pr = (res->flags & IORESOURCE_IO) ? in pcibios_allocate_bus_resources()
1240 pr = pci_find_parent_resource(bus->self, res); in pcibios_allocate_bus_resources()
1244 * bridge is transparent -- paulus in pcibios_allocate_bus_resources()
1251 bus->self ? pci_name(bus->self) : "PHB", bus->number, in pcibios_allocate_bus_resources()
1252 i, res, pr, (pr && pr->name) ? pr->name : "nil"); in pcibios_allocate_bus_resources()
1254 if (pr && !(pr->flags & IORESOURCE_UNSET)) { in pcibios_allocate_bus_resources()
1255 struct pci_dev *dev = bus->self; in pcibios_allocate_bus_resources()
1273 i, bus->number); in pcibios_allocate_bus_resources()
1279 * save more space. in pcibios_allocate_bus_resources()
1281 res->start = 0; in pcibios_allocate_bus_resources()
1282 res->end = -1; in pcibios_allocate_bus_resources()
1283 res->flags = 0; in pcibios_allocate_bus_resources()
1286 list_for_each_entry(b, &bus->children, node) in pcibios_allocate_bus_resources()
1292 struct resource *pr, *r = &dev->resource[idx]; in alloc_resource()
1298 if (!pr || (pr->flags & IORESOURCE_UNSET) || in alloc_resource()
1305 r->flags |= IORESOURCE_UNSET; in alloc_resource()
1306 r->end -= r->start; in alloc_resource()
1307 r->start = 0; in alloc_resource()
1321 r = &dev->resource[idx]; in pcibios_allocate_resources()
1322 if (r->parent) /* Already allocated */ in pcibios_allocate_resources()
1324 if (!r->flags || (r->flags & IORESOURCE_UNSET)) in pcibios_allocate_resources()
1331 if (r->flags & IORESOURCE_IO) in pcibios_allocate_resources()
1340 r = &dev->resource[PCI_ROM_RESOURCE]; in pcibios_allocate_resources()
1341 if (r->flags) { in pcibios_allocate_resources()
1346 pci_read_config_dword(dev, dev->rom_base_reg, ®); in pcibios_allocate_resources()
1350 r->flags &= ~IORESOURCE_ROM_ENABLE; in pcibios_allocate_resources()
1351 pci_write_config_dword(dev, dev->rom_base_reg, in pcibios_allocate_resources()
1368 if (!(hose->io_resource.flags & IORESOURCE_IO)) in pcibios_reserve_legacy_regions()
1370 offset = (unsigned long)hose->io_base_virt - _IO_BASE; in pcibios_reserve_legacy_regions()
1373 res->name = "Legacy IO"; in pcibios_reserve_legacy_regions()
1374 res->flags = IORESOURCE_IO; in pcibios_reserve_legacy_regions()
1375 res->start = offset; in pcibios_reserve_legacy_regions()
1376 res->end = (offset + 0xfff) & 0xfffffffful; in pcibios_reserve_legacy_regions()
1378 if (request_resource(&hose->io_resource, res)) { in pcibios_reserve_legacy_regions()
1381 pci_domain_nr(bus), bus->number, res); in pcibios_reserve_legacy_regions()
1388 pres = &hose->mem_resources[i]; in pcibios_reserve_legacy_regions()
1389 offset = hose->mem_offset[i]; in pcibios_reserve_legacy_regions()
1390 if (!(pres->flags & IORESOURCE_MEM)) in pcibios_reserve_legacy_regions()
1393 if ((pres->start - offset) <= 0xa0000 && in pcibios_reserve_legacy_regions()
1394 (pres->end - offset) >= 0xbffff) in pcibios_reserve_legacy_regions()
1401 res->name = "Legacy VGA memory"; in pcibios_reserve_legacy_regions()
1402 res->flags = IORESOURCE_MEM; in pcibios_reserve_legacy_regions()
1403 res->start = 0xa0000 + offset; in pcibios_reserve_legacy_regions()
1404 res->end = 0xbffff + offset; in pcibios_reserve_legacy_regions()
1409 pci_domain_nr(bus), bus->number, res); in pcibios_reserve_legacy_regions()
1446 * rest of the code later, for now, keep it as-is as our main
1447 * resource allocation function doesn't deal with sub-trees yet.
1454 list_for_each_entry(dev, &bus->devices, bus_list) { in pcibios_claim_one_bus()
1459 if (r->parent || !r->start || !r->flags) in pcibios_claim_one_bus()
1472 list_for_each_entry(child_bus, &bus->children, node) in pcibios_claim_one_bus()
1487 pci_domain_nr(bus), bus->number); in pcibios_finish_adding_to_bus()
1493 if (bus->self) in pcibios_finish_adding_to_bus()
1494 pci_assign_unassigned_bridge_resources(bus->self); in pcibios_finish_adding_to_bus()
1506 struct pci_controller *phb = pci_bus_to_host(dev->bus); in pcibios_enable_device()
1508 if (phb->controller_ops.enable_device_hook) in pcibios_enable_device()
1509 if (!phb->controller_ops.enable_device_hook(dev)) in pcibios_enable_device()
1510 return -EINVAL; in pcibios_enable_device()
1517 struct pci_controller *phb = pci_bus_to_host(dev->bus); in pcibios_disable_device()
1519 if (phb->controller_ops.disable_device) in pcibios_disable_device()
1520 phb->controller_ops.disable_device(dev); in pcibios_disable_device()
1525 return (unsigned long) hose->io_base_virt - _IO_BASE; in pcibios_io_space_offset()
1536 res = &hose->io_resource; in pcibios_setup_phb_resources()
1538 if (!res->flags) { in pcibios_setup_phb_resources()
1541 hose->dn, hose->global_number); in pcibios_setup_phb_resources()
1552 res = &hose->mem_resources[i]; in pcibios_setup_phb_resources()
1553 if (!res->flags) in pcibios_setup_phb_resources()
1556 offset = hose->mem_offset[i]; in pcibios_setup_phb_resources()
1609 bus.ops = hose? hose->ops: &null_pci_ops; in fake_pci_bus()
1636 struct pci_controller *hose = bus->sysdata; in pcibios_get_phb_of_node()
1638 return of_node_get(hose->dn); in pcibios_get_phb_of_node()
1642 * pci_scan_phb - Given a pci_controller, setup and scan the PCI bus
1649 struct device_node *node = hose->dn; in pcibios_scan_phb()
1654 /* Get some IO space for the new PHB */ in pcibios_scan_phb()
1660 hose->busn.start = hose->first_busno; in pcibios_scan_phb()
1661 hose->busn.end = hose->last_busno; in pcibios_scan_phb()
1662 hose->busn.flags = IORESOURCE_BUS; in pcibios_scan_phb()
1663 pci_add_resource(&resources, &hose->busn); in pcibios_scan_phb()
1666 bus = pci_create_root_bus(hose->parent, hose->first_busno, in pcibios_scan_phb()
1667 hose->ops, hose, &resources); in pcibios_scan_phb()
1670 hose->global_number); in pcibios_scan_phb()
1674 hose->bus = bus; in pcibios_scan_phb()
1678 if (node && hose->controller_ops.probe_mode) in pcibios_scan_phb()
1679 mode = hose->controller_ops.probe_mode(bus); in pcibios_scan_phb()
1686 hose->last_busno = pci_scan_child_bus(bus); in pcibios_scan_phb()
1687 pci_bus_update_busn_res_end(bus, hose->last_busno); in pcibios_scan_phb()
1699 list_for_each_entry(child, &bus->children, node) in pcibios_scan_phb()
1707 int class = dev->class >> 8; in fixup_hide_host_resource_fsl()
1709 int prog_if = dev->class & 0xf; in fixup_hide_host_resource_fsl()
1714 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) && in fixup_hide_host_resource_fsl()
1716 (dev->bus->parent == NULL)) { in fixup_hide_host_resource_fsl()
1718 r->start = 0; in fixup_hide_host_resource_fsl()
1719 r->end = 0; in fixup_hide_host_resource_fsl()
1720 r->flags = 0; in fixup_hide_host_resource_fsl()