Lines Matching refs:r6
5 invstr: mflr r6 /* Make it accessible */
12 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
26 tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */
34 tlbsx 0,r6 /* Fall through, we had to match */
48 li r6,0 /* Set Entry counter to 0 */
50 rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
55 cmpw r3,r6
60 skpinv: addi r6,r6,1 /* Increment */
61 cmpw r6,r9 /* Are we done? */
65 li r6,0x04
66 tlbivax 0,r6
69 li r6,0x0c
70 tlbivax 0,r6
82 mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */
83 rlwinm r6,r6,25,27,31
85 addi r6,r6,10
86 slw r6,r8,r6 /* convert to mask */
95 and r8,r6,r8
96 subfic r9,r6,-4096
106 xori r6,r4,1 /* Setup TMP mapping in the other Address space */
107 slwi r6,r6,12
108 oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h
109 ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_4K))@l
110 mtspr SPRN_MAS1,r6
111 mfspr r6,SPRN_MAS2
113 rlwimi r7,r6,0,20,31
118 xori r6,r4,1
119 slwi r6,r6,5 /* setup new context with other address space */
125 mtspr SPRN_SRR1,r6
129 li r6,0
130 mtspr SPRN_MAS6,r6
131 mtspr SPRN_PID0,r6
138 mtspr SPRN_PID1,r6
139 mtspr SPRN_PID2,r6
147 mfspr r6,SPRN_MAS1
148 rlwinm r6,r6,0,2,0 /* clear IPROT */
149 mtspr SPRN_MAS1,r6
159 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
160 mtspr SPRN_MAS0,r6
161 lis r6,(MAS1_VALID|MAS1_IPROT)@h
162 ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
163 mtspr SPRN_MAS1,r6
164 lis r6,MAS2_EPN_MASK(BOOK3E_PAGESZ_64M)@h
165 ori r6,r6,MAS2_EPN_MASK(BOOK3E_PAGESZ_64M)@l
166 and r6,r6,r20
167 ori r6,r6,MAS2_M_IF_NEEDED@l
168 mtspr SPRN_MAS2,r6
173 mr r6,r20
203 mr r6, r25
212 rlwimi r6,r9,0,20,31
213 addi r6,r6,(2f - 1b)
214 mtspr SPRN_SRR0,r6