include/asm/cpm1.h

1 /* SPDX-License-Identifier: GPL-2.0 */
8  * through the MPC8xx internal memory map.  See immap.h for details.
11  * are needed.  -- Dan
13  * On the MBX board, EPPC-Bug loads CPM microcode into the first 512
16  * or other use.
70 /* Define enough so I can at least use the serial port as a UART.
79 	uint	smc_rstate;	/* Internal */
80 	uint	smc_idp;	/* Internal */
81 	ushort	smc_rbptr;	/* Internal */
82 	ushort	smc_ibc;	/* Internal */
83 	uint	smc_rxtmp;	/* Internal */
84 	uint	smc_tstate;	/* Internal */
85 	uint	smc_tdp;	/* Internal */
86 	ushort	smc_tbptr;	/* Internal */
87 	ushort	smc_tbc;	/* Internal */
88 	uint	smc_txtmp;	/* Internal */
181 /* SI Clock Route Register
290 	uint	scc_rstate;	/* Internal */
291 	uint	scc_idp;	/* Internal */
292 	ushort	scc_rbptr;	/* Internal */
293 	ushort	scc_ibc;	/* Internal */
294 	uint	scc_rxtmp;	/* Internal */
295 	uint	scc_tstate;	/* Internal */
296 	uint	scc_tdp;	/* Internal */
297 	ushort	scc_tbptr;	/* Internal */
298 	ushort	scc_tbc;	/* Internal */
299 	uint	scc_txtmp;	/* Internal */
300 	uint	scc_rcrc;	/* Internal */
301 	uint	scc_tcrc;	/* Internal */
331 	uint	sen_tbuf0data0;	/* Save area 0 - current frame */
332 	uint	sen_tbuf0data1;	/* Save area 1 - current frame */
333 	uint	sen_tbuf0rba;	/* Internal */
334 	uint	sen_tbuf0crc;	/* Internal */
335 	ushort	sen_tbuf0bcnt;	/* Internal */
343 	uint	sen_tbuf1data0;	/* Save area 0 - current frame */
344 	uint	sen_tbuf1data1;	/* Save area 1 - current frame */
345 	uint	sen_tbuf1rba;	/* Internal */
346 	uint	sen_tbuf1crc;	/* Internal */
347 	ushort	sen_tbuf1bcnt;	/* Internal */
464 	uint	iic_rstate;	/* Internal */
465 	uint	iic_rdp;	/* Internal */
466 	ushort	iic_rbptr;	/* Internal */
467 	ushort	iic_rbc;	/* Internal */
468 	uint	iic_rxtmp;	/* Internal */
469 	uint	iic_tstate;	/* Internal */
470 	uint	iic_tdp;	/* Internal */
471 	ushort	iic_tbptr;	/* Internal */
472 	ushort	iic_tbc;	/* Internal */
473 	uint	iic_txtmp;	/* Internal */
491 	unsigned short	tm_ptr;		/* RISC Timer Table Pointer (internal) */
495 	unsigned long	tm_cnt;		/* RISC Timer Internal Count */
499 #define TM_CMD_VALID	0x80000000	/* Valid - Enables the timer */
500 #define TM_CMD_RESTART	0x40000000	/* Restart - for automatic restart */
509  * use the table as defined in the manuals (i.e. no special high
550 #define CICR_HP_MASK		((uint)0x00001f00)	/* Hi-pri int. */
593 	CPM_CLK1,	/* Clock  1 */
594 	CPM_CLK2,	/* Clock  2 */
595 	CPM_CLK3,	/* Clock  3 */
596 	CPM_CLK4,	/* Clock  4 */
597 	CPM_CLK5,	/* Clock  5 */
598 	CPM_CLK6,	/* Clock  6 */
599 	CPM_CLK7,	/* Clock  7 */
600 	CPM_CLK8,	/* Clock  8 */
603 int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode);