Lines Matching +full:xor +full:- +full:v2
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 * 32 bits of 0s to the end - this matches what a CRC does. We just
28 #include <asm/ppc-opcode.h>
66 std r31,-8(r1)
67 std r30,-16(r1)
68 std r29,-24(r1)
69 std r28,-32(r1)
70 std r27,-40(r1)
71 std r26,-48(r1)
72 std r25,-56(r1)
101 vspltisw v0,-1
141 * data - 128 / 16 = 8
148 addi r7,r7,-1
156 /* zero v0-v7 which will contain our checksums */
159 vxor v2,v2,v2
170 * already in v16-v23.
194 /* xor in initial value */
248 * to complete - first iteration load, second iteration vpmsum, third
249 * iteration xor.
268 vxor v2,v2,v10
321 vxor v2,v2,v10
349 vxor v2,v2,v10
365 vsldoi v2,v2,zeroes,4
373 /* xor with last 1024 bits */
395 vxor v18,v2,v10
424 lvx v2,off32,r3
434 VPMSUMW(v2,v18,v2)
441 /* Now reduce the tail (0 - 112 bytes) */
493 /* Now xor all the parallel chunks together */
495 vxor v2,v2,v3
499 vxor v0,v0,v2
512 vxor v0,v0,v1 /* xor two 64 bit results together */
531 vxor v0,v0,v1 /* a - qn, subtraction is xor in GF(2) */
544 * our vector registers goes from 0-63 instead of 63-0. We can reflect
551 vxor v0,v0,v1 /* a - qn, subtraction is xor in GF(2) */
580 ld r31,-8(r1)
581 ld r30,-16(r1)
582 ld r29,-24(r1)
583 ld r28,-32(r1)
584 ld r27,-40(r1)
585 ld r26,-48(r1)
586 ld r25,-56(r1)
625 vxor v0,v0,v8 /* xor in initial value */
635 lvx v2,off32,r4
637 VPERM(v2,v2,v16,byteswap)
638 VPMSUMW(v2,v2,v16)
734 .Lv2: vxor v20,v20,v2