Lines Matching +full:5 +full:- +full:8

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
13 # do rounds, 8 quarter rounds
16 # 3. a += b; d ^= a; d <<<= 8;
21 # row1 = (row1 + row2), row4 = row1 xor row4, row4 rotate each word by 8
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 stdu 1,-752(1)
199 vadduwm 1, 1, 5
216 vadduwm 8, 8, 12
224 vxor 4, 4, 8
225 vxor 5, 5, 9
236 vrlw 5, 5, 25
245 vadduwm 1, 1, 5
264 vadduwm 8, 8, 12
274 vxor 4, 4, 8
275 vxor 5, 5, 9
283 vrlw 5, 5, 28
295 vadduwm 0, 0, 5
316 vadduwm 8, 8, 13
322 vxor 5, 5, 10
324 vxor 7, 7, 8
333 vrlw 5, 5, 25
343 vadduwm 0, 0, 5
366 vadduwm 8, 8, 13
375 vxor 5, 5, 10
377 vxor 7, 7, 8
383 vrlw 5, 5, 28
397 vadduwm 1, 1, 5
404 vadduwm 8, 8, 12
408 vxor 4, 4, 8
409 vxor 5, 5, 9
413 vrlw 5, 5, 21
417 vadduwm 1, 1, 5
424 vadduwm 8, 8, 12
428 vxor 4, 4, 8
429 vxor 5, 5, 9
433 vrlw 5, 5, 23
438 vadduwm 0, 0, 5
448 vadduwm 8, 8, 13
450 vxor 5, 5, 10
452 vxor 7, 7, 8
454 vrlw 5, 5, 21
458 vadduwm 0, 0, 5
468 vadduwm 8, 8, 13
470 vxor 5, 5, 10
472 vxor 7, 7, 8
474 vrlw 5, 5, 23
494 vadduwm \S+0, \S+0, 16-\S
495 vadduwm \S+4, \S+4, 17-\S
496 vadduwm \S+8, \S+8, 18-\S
497 vadduwm \S+12, \S+12, 19-\S
499 vadduwm \S+1, \S+1, 16-\S
500 vadduwm \S+5, \S+5, 17-\S
501 vadduwm \S+9, \S+9, 18-\S
502 vadduwm \S+13, \S+13, 19-\S
504 vadduwm \S+2, \S+2, 16-\S
505 vadduwm \S+6, \S+6, 17-\S
506 vadduwm \S+10, \S+10, 18-\S
507 vadduwm \S+14, \S+14, 19-\S
509 vadduwm \S+3, \S+3, 16-\S
510 vadduwm \S+7, \S+7, 17-\S
511 vadduwm \S+11, \S+11, 18-\S
512 vadduwm \S+15, \S+15, 19-\S
519 add 9, 14, 5
526 lxvw4x 5, 21, 9
529 lxvw4x 8, 24, 9
543 xxlxor \S+37, \S+37, 5
546 xxlxor \S+34, \S+34, 8
581 .align 5
587 # r17 - r31 mainly for Write_256 macro.
618 vmrglw 5, 2, 3
619 vsldoi 30, 4, 5, 8 # vr30 counter, 4 (0, 1, 2, 3)
629 sradi 8, 7, 1
631 mtctr 8
640 vspltisw 26, 8
664 xxspltw 32+5, 17, 1
667 xxspltw 32+8, 18, 0
696 .align 5
707 TP_4x 4, 5, 6, 7
708 TP_4x 8, 9, 10, 11
726 addi 15, 15, -256 # len -=256
728 xxlor 5, 32+31, 32+31
731 xxlor 32+31, 5, 5
733 TP_4x 16+4, 16+5, 16+6, 16+7
734 TP_4x 16+8, 16+9, 16+10, 16+11
744 addi 15, 15, -256 # len +=256
760 mtctr 8
776 sradi 8, 7, 1
777 mtctr 8
786 vspltw 5, 17, 1
789 vspltw 8, 18, 0
799 .align 5
807 TP_4x 4, 5, 6, 7
808 TP_4x 8, 9, 10, 11
814 addi 15, 15, -256 # len += 256
825 mtctr 8
838 .align 5