Lines Matching +full:1 +full:f00000
26 #address-cells = <1>;
42 PowerPC,8572@1 {
63 #size-cells = <1>;
70 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */
78 #address-cells = <1>;
79 #size-cells = <1>;
84 partition@6f00000 {
88 partition@7f00000 {
103 nor-alternate@1,0 {
107 reg = <1 0 0x8000000>; /* 128MB */
108 #address-cells = <1>;
109 #size-cells = <1>;
114 partition@6f00000 {
118 partition@7f00000 {
134 #address-cells = <1>;
135 #size-cells = <1>;
137 * Actual part could be ST Micro NAND08GW3B2A (1 GB),
139 * MT29F16G08FAA (2x 1 GB), depending on the build
145 /* U-Boot should fix this up if chip size > 1 GB */
155 #address-cells = <1>;
156 #size-cells = <1>;
193 cache-size = <0x100000>; // L2, 1M
199 #address-cells = <1>;
247 gpio2: gpio@1c {
255 gpio3: gpio@1e {
263 gpio4: gpio@1f {
273 #address-cells = <1>;
275 cell-index = <1>;
284 #address-cells = <1>;
285 #size-cells = <1>;
289 cell-index = <1>;
302 cell-index = <1>;
325 #address-cells = <1>;
326 #size-cells = <1>;
343 cell-index = <1>;
365 /* eTSEC 1 */
367 #address-cells = <1>;
368 #size-cells = <1>;
383 #address-cells = <1>;
388 phy0: ethernet-phy@1 {
390 interrupts = <8 1>;
395 interrupts = <8 1>;
407 #address-cells = <1>;
408 #size-cells = <1>;
409 cell-index = <1>;
423 #address-cells = <1>;
448 cell-index = <1>;
481 "fsl,sec2.1", "fsl,sec2.0";
514 gpios = <&gpio0 4 1>;
520 gpios = <&gpio0 5 1>;
525 gpios = <&gpio0 6 1>;
530 gpios = <&gpio0 7 1>;
566 #interrupt-cells = <1>;
599 /* PCI Express controller 1, wired to PEX8518 PCIe switch */
603 #interrupt-cells = <1>;