boot/dts/turris1x.dts

37 		ranges = <0x0 0x0 0xffe00000 0x00100000>;
44 				reg = <0x18>;
47 				polarity = <0x00>;
57 				reg = <0x2a>;
62 				reg = <0x32>;
68 				reg = <0x4c>;
73 				#size-cells = <0>;
76 				channel@0 {
77 					reg = <0>;
91 				reg = <0x52>;
96 				reg = <0x57>;
102 				reg = <0x64>;
108 				reg = <0x69>;
114 				reg = <0x6f>;
116 				interrupts = <14 0>; /* GPIO14 - MFP pin */
148 				interrupts = <3 1 0 0>;
149 				reg = <0x7>;
155 				interrupts = <2 1 0 0>;
156 				reg = <0x10>;
160 					#size-cells = <0>;
162 					port@0 {
163 						reg = <0>;
217 			fsl,tmr-add = <0xcccccccd>;
218 			fsl,tmr-fiper1 = <0x3b9ac9fb>;
219 			fsl,tmr-fiper2 = <0x0001869b>;
224 			/* Connected to port 0 of QCA8337N-AL3C switch */
255 		reg = <0 0xffe05000 0 0x1000>;
257 		ranges = <0x0 0x0 0x0 0xef000000 0x01000000>, /* NOR */
258 			 <0x1 0x0 0x0 0xff800000 0x00040000>, /* NAND */
259 			 <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */
262 		nor@0,0 {
264 			reg = <0x0 0x0 0x01000000>;
273 				partition@0 {
275 					reg = <0x00000000 0x00020000>;
281 					reg = <0x00020000 0x001a0000>;
287 					reg = <0x001c0000 0x00180000>;
293 					reg = <0x00340000 0x00b00000>;
299 					reg = <0x00e40000 0x000c0000>;
303 				/* free unused space 0x00f00000-0x00f20000 */
307 					reg = <0x00f20000 0x00020000>;
313 					reg = <0x00f40000 0x000c0000>;
320 		nand@1,0 {
322 			reg = <0x1 0x0 0x00040000>;
331 				partition@0 {
333 					reg = <0x00000000 0x10000000>;
340 		cpld@3,0 {
350 			reg = <0x3 0x0 0x30>;
353 			ranges = <0x0 0x3 0x0 0x00020000>;
360 				 * memory space at byte offset 0x2. WDI
365 				reg = <0x02 0x01>;
383 				 * watchdog has priority level 0 and default
393 				reg = <0x0d 0x01>;
394 				offset = <0x0d>;
395 				mask = <0x01>;
396 				value = <0x01>;
408 				reg = <0x13 0x1d>;
410 				#size-cells = <0>;
412 				multi-led@0 {
413 					reg = <0x0>;
419 					reg = <0x1>;
426 					reg = <0x2>;
433 					reg = <0x3>;
440 					reg = <0x4>;
447 					reg = <0x5>;
454 					reg = <0x6>;
460 					reg = <0x7>;
475 		 * channels. Channel 0 is connected to the front USB 3.0 port,
483 		reg = <0 0xffe08000 0 0x1000>;
484 		ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00020000>, /* MEM */
485 			 <0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */
487 		pcie@0 {
494 		reg = <0 0xffe09000 0 0x1000>;
495 		ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */
496 			 <0x01000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; /* IO */
498 		pcie@0 {
510 		reg = <0 0xffe0a000 0 0x1000>;
511 		ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */
512 			 <0x01000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; /* IO */
514 		pcie@0 {