boot/dts/taishan.dts

13 /dts-v1/;
16 	#address-cells = <2>;
17 	#size-cells = <1>;
20 	dcr-parent = <&{/cpus/cpu@0}>;
30 		#address-cells = <1>;
31 		#size-cells = <0>;
37 			clock-frequency = <800000000>; // 800MHz
38 			timebase-frequency = <0>; // Filled in by zImage
39 			i-cache-line-size = <50>;
40 			d-cache-line-size = <50>;
41 			i-cache-size = <32768>; /* 32 kB */
42 			d-cache-size = <32768>; /* 32 kB */
43 			dcr-controller;
44 			dcr-access-method = "native";
54 	UICB0: interrupt-controller-base {
55 		compatible = "ibm,uic-440gx", "ibm,uic";
56 		interrupt-controller;
57 		cell-index = <3>;
58 		dcr-reg = <0x200 0x009>;
59 		#address-cells = <0>;
60 		#size-cells = <0>;
61 		#interrupt-cells = <2>;
65 	UIC0: interrupt-controller0 {
66 		compatible = "ibm,uic-440gx", "ibm,uic";
67 		interrupt-controller;
68 		cell-index = <0>;
69 		dcr-reg = <0x0c0 0x009>;
70 		#address-cells = <0>;
71 		#size-cells = <0>;
72 		#interrupt-cells = <2>;
73 		interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
74 		interrupt-parent = <&UICB0>;
78 	UIC1: interrupt-controller1 {
79 		compatible = "ibm,uic-440gx", "ibm,uic";
80 		interrupt-controller;
81 		cell-index = <1>;
82 		dcr-reg = <0x0d0 0x009>;
83 		#address-cells = <0>;
84 		#size-cells = <0>;
85 		#interrupt-cells = <2>;
87 		interrupt-parent = <&UICB0>;
90 	UIC2: interrupt-controller2 {
91 		compatible = "ibm,uic-440gx", "ibm,uic";
92 		interrupt-controller;
93 		cell-index = <2>; /* was 1 */
94 		dcr-reg = <0x210 0x009>;
95 		#address-cells = <0>;
96 		#size-cells = <0>;
97 		#interrupt-cells = <2>;
99 		interrupt-parent = <&UICB0>;
104 		compatible = "ibm,cpc-440gp";
105 		dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
110 		compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
111 		dcr-reg = <0x020 0x008			/* Internal SRAM DCR's */
113 		cache-line-size = <32>;		/* 32 bytes */
114 		cache-size = <262144>;		/* L2, 256K */
115 		interrupt-parent = <&UIC2>;
120 		compatible = "ibm,plb-440gx", "ibm,plb4";
121 		#address-cells = <2>;
122 		#size-cells = <1>;
124 		clock-frequency = <160000000>; // 160MHz
126 		SDRAM0: memory-controller {
127 			compatible = "ibm,sdram-440gp";
128 			dcr-reg = <0x010 0x002>;
133 			compatible = "ibm,sram-440gp";
134 			dcr-reg = <0x020 0x008 0x00a 0x001>;
139 			compatible = "ibm,dma-440gp";
140 			dcr-reg = <0x100 0x027>;
144 			compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
145 			dcr-reg = <0x180 0x062>;
146 			num-tx-chans = <4>;
147 			num-rx-chans = <4>;
148 			interrupt-parent = <&MAL0>;
150 			#interrupt-cells = <1>;
151 			#address-cells = <0>;
152 			#size-cells = <0>;
153 			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
158 			interrupt-map-mask = <0xffffffff>;
162 			compatible = "ibm,opb-440gx", "ibm,opb";
163 			#address-cells = <1>;
164 			#size-cells = <1>;
165 			/* Wish there was a nicer way of specifying a full 32-bit
169 			dcr-reg = <0x090 0x00b>;
170 			interrupt-parent = <&UIC1>;
172 			clock-frequency = <80000000>; // 80MHz
176 				compatible = "ibm,ebc-440gx", "ibm,ebc";
177 				dcr-reg = <0x012 0x002>;
178 				#address-cells = <2>;
179 				#size-cells = <1>;
180 				clock-frequency = <80000000>; // 80MHz
187 				interrupt-parent = <&UIC1>;
190 					compatible = "cfi-flash";
191 					bank-width = <4>;
192 					device-width = <2>;
194 					#address-cells = <1>;
195 					#size-cells = <1>;
213 						label = "u-boot";
225 				virtual-reg = <0xe0000200>;
226  				clock-frequency = <11059200>;
227 				current-speed = <115200>; /* 115200 */
228 				interrupt-parent = <&UIC0>;
236 				virtual-reg = <0xe0000300>;
237 				clock-frequency = <11059200>;
238 				current-speed = <115200>; /* 115200 */
239 				interrupt-parent = <&UIC0>;
245 				compatible = "ibm,iic-440gp", "ibm,iic";
247 				interrupt-parent = <&UIC0>;
252 				compatible = "ibm,iic-440gp", "ibm,iic";
254 				interrupt-parent = <&UIC0>;
260 				compatible = "ibm,gpio-440gp";
264 			ZMII0: emac-zmii@40000780 {
265 				compatible = "ibm,zmii-440gx", "ibm,zmii";
269 			RGMII0: emac-rgmii@40000790 {
274 			TAH0: emac-tah@40000b50 {
275 				compatible = "ibm,tah-440gx", "ibm,tah";
279 			TAH1: emac-tah@40000d50 {
280 				compatible = "ibm,tah-440gx", "ibm,tah";
287 				compatible = "ibm,emac-440gx", "ibm,emac4";
288 				interrupt-parent = <&UIC1>;
291 				local-mac-address = [000000000000]; // Filled in by zImage
292 				mal-device = <&MAL0>;
293 				mal-tx-channel = <0>;
294 				mal-rx-channel = <0>;
295 				cell-index = <0>;
296 				max-frame-size = <1500>;
297 				rx-fifo-size = <4096>;
298 				tx-fifo-size = <2048>;
299 				phy-mode = "rmii";
300 				phy-map = <0x00000001>;
301 				zmii-device = <&ZMII0>;
302 				zmii-channel = <0>;
307 				compatible = "ibm,emac-440gx", "ibm,emac4";
308 				interrupt-parent = <&UIC1>;
311 				local-mac-address = [000000000000]; // Filled in by zImage
312 				mal-device = <&MAL0>;
313 				mal-tx-channel = <1>;
314 				mal-rx-channel = <1>;
315 				cell-index = <1>;
316 				max-frame-size = <1500>;
317 				rx-fifo-size = <4096>;
318 				tx-fifo-size = <2048>;
319 				phy-mode = "rmii";
320 				phy-map = <0x00000001>;
321  				zmii-device = <&ZMII0>;
322 				zmii-channel = <1>;
327 				compatible = "ibm,emac-440gx", "ibm,emac4";
328 				interrupt-parent = <&UIC2>;
331 				local-mac-address = [000000000000]; // Filled in by zImage
332 				mal-device = <&MAL0>;
333 				mal-tx-channel = <2>;
334 				mal-rx-channel = <2>;
335 				cell-index = <2>;
336 				max-frame-size = <9000>;
337 				rx-fifo-size = <4096>;
338 				tx-fifo-size = <2048>;
339 				phy-mode = "rgmii";
340 				phy-address = <1>;
341 				rgmii-device = <&RGMII0>;
342 				rgmii-channel = <0>;
343  				zmii-device = <&ZMII0>;
344 				zmii-channel = <2>;
345 				tah-device = <&TAH0>;
346 				tah-channel = <0>;
351 				compatible = "ibm,emac-440gx", "ibm,emac4";
352 				interrupt-parent = <&UIC2>;
355 				local-mac-address = [000000000000]; // Filled in by zImage
356 				mal-device = <&MAL0>;
357 				mal-tx-channel = <3>;
358 				mal-rx-channel = <3>;
359 				cell-index = <3>;
360 				max-frame-size = <9000>;
361 				rx-fifo-size = <4096>;
362 				tx-fifo-size = <2048>;
363 				phy-mode = "rgmii";
364 				phy-address = <3>;
365 				rgmii-device = <&RGMII0>;
366 				rgmii-channel = <1>;
367  				zmii-device = <&ZMII0>;
368 				zmii-channel = <3>;
369 				tah-device = <&TAH1>;
370 				tah-channel = <0>;
377 				interrupt-parent = <&UIC0>;
385 			#interrupt-cells = <1>;
386 			#size-cells = <2>;
387 			#address-cells = <3>;
388 			compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
390 			large-inbound-windows;
391 			enable-msi-hole;
405 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
407 			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
408 			interrupt-map = <
425 		stdout-path = "/plb/opb/serial@40000300";