boot/dts/mpc8349emitxgp.dts

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * MPC8349E-mITX-GP Device Tree Source
8 /dts-v1/;
13 	#address-cells = <1>;
14 	#size-cells = <1>;
24 		#address-cells = <1>;
25 		#size-cells = <0>;
30 			d-cache-line-size = <32>;
31 			i-cache-line-size = <32>;
32 			d-cache-size = <32768>;
33 			i-cache-size = <32768>;
34 			timebase-frequency = <0>;	// from bootloader
35 			bus-frequency = <0>;		// from bootloader
36 			clock-frequency = <0>;		// from bootloader
46 		#address-cells = <1>;
47 		#size-cells = <1>;
49 		compatible = "simple-bus";
52 		bus-frequency = <0>;                    // from bootloader
61 			#address-cells = <1>;
62 			#size-cells = <0>;
63 			cell-index = <0>;
64 			compatible = "fsl-i2c";
67 			interrupt-parent = <&ipic>;
72 			#address-cells = <1>;
73 			#size-cells = <0>;
74 			cell-index = <1>;
75 			compatible = "fsl-i2c";
78 			interrupt-parent = <&ipic>;
85 				interrupt-parent = <&ipic>;
90 			cell-index = <0>;
94 			interrupt-parent = <&ipic>;
99 			#address-cells = <1>;
100 			#size-cells = <1>;
101 			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
104 			interrupt-parent = <&ipic>;
106 			cell-index = <0>;
107 			dma-channel@0 {
108 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
110 				cell-index = <0>;
111 				interrupt-parent = <&ipic>;
114 			dma-channel@80 {
115 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117 				cell-index = <1>;
118 				interrupt-parent = <&ipic>;
121 			dma-channel@100 {
122 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 				cell-index = <2>;
125 				interrupt-parent = <&ipic>;
128 			dma-channel@180 {
129 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
131 				cell-index = <3>;
132 				interrupt-parent = <&ipic>;
138 			compatible = "fsl-usb2-dr";
140 			#address-cells = <1>;
141 			#size-cells = <0>;
142 			interrupt-parent = <&ipic>;
149 			#address-cells = <1>;
150 			#size-cells = <1>;
151 			cell-index = <0>;
157 			local-mac-address = [ 00 00 00 00 00 00 ];
159 			interrupt-parent = <&ipic>;
160 			tbi-handle = <&tbi0>;
161 			phy-handle = <&phy1c>;
162 			linux,network-index = <0>;
165 				#address-cells = <1>;
166 				#size-cells = <0>;
167 				compatible = "fsl,gianfar-mdio";
171 				phy1c: ethernet-phy@1c {
172 					interrupt-parent = <&ipic>;
177 				tbi0: tbi-phy@11 {
179 					device_type = "tbi-phy";
185 			cell-index = <0>;
189 			clock-frequency = <0>;		// from bootloader
191 			interrupt-parent = <&ipic>;
195 			cell-index = <1>;
199 			clock-frequency = <0>;		// from bootloader
201 			interrupt-parent = <&ipic>;
208 			interrupt-parent = <&ipic>;
209 			fsl,num-channels = <4>;
210 			fsl,channel-fifo-len = <24>;
211 			fsl,exec-units-mask = <0x7e>;
212 			fsl,descriptor-types-mask = <0x01010ebf>;
216 			interrupt-controller;
217 			#address-cells = <0>;
218 			#interrupt-cells = <2>;
225 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
226 		interrupt-map = <
227 				/* IDSEL 0x0F - PCI Slot */
231 		interrupt-parent = <&ipic>;
233 		bus-range = <0x1 0x1>;
237 		clock-frequency = <66666666>;
238 		#interrupt-cells = <1>;
239 		#size-cells = <2>;
240 		#address-cells = <3>;
243 		compatible = "fsl,mpc8349-pci";