boot/dts/mpc8308_p1m.dts

1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 	#address-cells = <1>;
13 	#size-cells = <1>;
24 		#address-cells = <1>;
25 		#size-cells = <0>;
30 			d-cache-line-size = <32>;
31 			i-cache-line-size = <32>;
32 			d-cache-size = <16384>;
33 			i-cache-size = <16384>;
34 			timebase-frequency = <0>;	// from bootloader
35 			bus-frequency = <0>;		// from bootloader
36 			clock-frequency = <0>;		// from bootloader
46 		#address-cells = <2>;
47 		#size-cells = <1>;
48 		compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
51 		interrupt-parent = <&ipic>;
58 			#address-cells = <1>;
59 			#size-cells = <1>;
60 			compatible = "cfi-flash";
62 			bank-width = <2>;
63 			device-width = <1>;
65 			u-boot@0 {
67 				read-only;
93 			interrups-parent = <&ipic>;
97 			compatible = "denx,mpc8308_p1m-cpld";
100 			interrups-parent = <&ipic>;
105 		#address-cells = <1>;
106 		#size-cells = <1>;
108 		compatible = "fsl,mpc8308-immr", "simple-bus";
111 		bus-frequency = <0>;
114 			#address-cells = <1>;
115 			#size-cells = <0>;
116 			compatible = "fsl-i2c";
119 			interrupt-parent = <&ipic>;
128 			#address-cells = <1>;
129 			#size-cells = <0>;
130 			compatible = "fsl-i2c";
133 			interrupt-parent = <&ipic>;
154 			compatible = "fsl-usb2-dr";
156 			#address-cells = <1>;
157 			#size-cells = <0>;
158 			interrupt-parent = <&ipic>;
165 			#address-cells = <1>;
166 			#size-cells = <1>;
169 			cell-index = <0>;
174 			local-mac-address = [ 00 00 00 00 00 00 ];
176 			interrupt-parent = <&ipic>;
177 			phy-handle = < &phy1 >;
180 				#address-cells = <1>;
181 				#size-cells = <0>;
182 				compatible = "fsl,gianfar-mdio";
184 				phy1: ethernet-phy@1 {  label
185 					interrupt-parent = <&ipic>;
189 				phy2: ethernet-phy@2 {
190 					interrupt-parent = <&ipic>;
194 				tbi0: tbi-phy@11 {
196 					device_type = "tbi-phy";
202 			#address-cells = <1>;
203 			#size-cells = <1>;
204 			cell-index = <1>;
210 			local-mac-address = [ 00 00 00 00 00 00 ];
212 			interrupt-parent = <&ipic>;
213 			phy-handle = < &phy2 >;
216 				#address-cells = <1>;
217 				#size-cells = <0>;
218 				compatible = "fsl,gianfar-tbi";
220 				tbi1: tbi-phy@11 {
222 					device_type = "tbi-phy";
228 			cell-index = <0>;
232 			clock-frequency = <133333333>;
234 			interrupt-parent = <&ipic>;
238 			cell-index = <1>;
242 			clock-frequency = <133333333>;
244 			interrupt-parent = <&ipic>;
248 			#gpio-cells = <2>;
249 			compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
252 			interrupt-parent = <&ipic>;
253 			gpio-controller;
257 			compatible = "fsl,mpc8308-gtm", "fsl,gtm";
260 			interrupt-parent = <&ipic>;
261 			clock-frequency = <133333333>;
268 		 * sense == 2: Edge, high-to-low change
270 		ipic: interrupt-controller@700 {
272 			interrupt-controller;
273 			#address-cells = <0>;
274 			#interrupt-cells = <2>;
279 		ipic-msi@7c0 {
280 			compatible = "fsl,ipic-msi";
282 			msi-available-ranges = <0x0 0x100>;
291 			interrupt-parent = < &ipic >;
295 			compatible = "fsl,mpc8308-dma";
299 			interrupt-parent = < &ipic >;
305 		#address-cells = <3>;
306 		#size-cells = <2>;
307 		#interrupt-cells = <1>;
309 		compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
314 		bus-range = <0 0>;
315 		interrupt-map-mask = <0 0 0 0>;
316 		interrupt-map = <0 0 0 0 &ipic 1 8>;
318 		interrupt-parent = <&ipic>;
319 		clock-frequency = <0>;
322 			#address-cells = <3>;
323 			#size-cells = <2>;